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verilog-halfAdder
verilog-halfAdder PublicHardware Simulation using Icarus Verilog EDA Playground for a half adder circuit design and test bench.
SystemVerilog 1
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verilog-memoryBlockSimulator
verilog-memoryBlockSimulator PublicHere is my solution for the simulation of memory blocks on a FIFO-based model, using ISE: CORE Generator (Xilinx).
Verilog 1
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verilog-decoders
verilog-decoders PublicA collection of decoders and their test benches simulated using Verilog.
SystemVerilog 1
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