Add in isr to hcd int hanlder

.github/workflows/build_arm.yml

@@ -36,7 +36,7 @@ jobs:
  - 'broadcom_32bit'
  - 'kinetis_k32l2'
  - 'lpc11 lpc13 lpc15 lpc17'
- - 'lpc51 lpc54'
+ - 'lpc51'
  - 'mm32 msp432e4'
  - 'samd11 same5x saml2x'
  - 'stm32f2 stm32f3'

.github/workflows/cmake_arm.yml

@@ -36,7 +36,7 @@ jobs:
  - 'imxrt'
  - 'kinetis_kl'
  - 'lpc18 lpc40 lpc43'
- - 'lpc55'
+ - 'lpc54 lpc55'
  - 'mcx'
  - 'nrf'
  - 'ra'

examples/host/bare_api/only.txt

@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX

examples/host/cdc_msc_hid/only.txt

@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX

examples/host/hid_controller/only.txt

@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX

examples/host/msc_file_explorer/only.txt

@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX

hw/bsp/family_support.cmake

@@ -40,6 +40,7 @@ if (NOT FAMILY STREQUAL rp2040)
  # enable LTO if supported skip rp2040
  include(CheckIPOSupported)
  check_ipo_supported(RESULT IPO_SUPPORTED)
+ cmake_print_variables(IPO_SUPPORTED)
  if (IPO_SUPPORTED)
  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
  endif()

hw/bsp/imxrt/family.c

@@ -188,7 +188,7 @@ void USB_OTG1_IRQHandler(void)
  #endif
 
  #if PORT_SUPPORT_HOST(0)
- tuh_int_handler(0);
+ tuh_int_handler(0, true);
  #endif
 }
 
@@ -199,7 +199,7 @@ void USB_OTG2_IRQHandler(void)
  #endif
 
  #if PORT_SUPPORT_HOST(1)
- tuh_int_handler(1);
+ tuh_int_handler(1, true);
  #endif
 }
 

hw/bsp/kinetis_kl/family.c

@@ -39,7 +39,7 @@
 void USB0_IRQHandler(void)
 {
 #if CFG_TUH_ENABLED
- tuh_int_handler(0);
+ tuh_int_handler(0, true);
 #endif
 #if CFG_TUD_ENABLED
  tud_int_handler(0);

hw/bsp/kinetis_kl/family.cmake

@@ -22,48 +22,47 @@ set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
- if (NOT TARGET ${BOARD_TARGET})
- add_library(${BOARD_TARGET} STATIC
- ${SDK_DIR}/drivers/gpio/fsl_gpio.c
- ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c
- ${SDK_DIR}/drivers/uart/fsl_uart.c
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
- ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
- )
- target_compile_definitions(${BOARD_TARGET} PUBLIC
- )
- target_include_directories(${BOARD_TARGET} PUBLIC
- ${CMSIS_DIR}/CMSIS/Core/Include
- ${SDK_DIR}/devices/${MCU_VARIANT}
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
- ${SDK_DIR}/drivers/common
- ${SDK_DIR}/drivers/gpio
- ${SDK_DIR}/drivers/lpsci
- ${SDK_DIR}/drivers/port
- ${SDK_DIR}/drivers/smc
- ${SDK_DIR}/drivers/uart
- )
+ if (TARGET ${BOARD_TARGET})
+ return()
+ endif ()
 
- update_board(${BOARD_TARGET})
+ add_library(${BOARD_TARGET} STATIC
+ ${SDK_DIR}/drivers/gpio/fsl_gpio.c
+ ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c
+ ${SDK_DIR}/drivers/uart/fsl_uart.c
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+ ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+ )
+ target_compile_definitions(${BOARD_TARGET} PUBLIC
+ )
+ target_include_directories(${BOARD_TARGET} PUBLIC
+ ${CMSIS_DIR}/CMSIS/Core/Include
+ ${SDK_DIR}/devices/${MCU_VARIANT}
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+ ${SDK_DIR}/drivers/common
+ ${SDK_DIR}/drivers/gpio
+ ${SDK_DIR}/drivers/lpsci
+ ${SDK_DIR}/drivers/port
+ ${SDK_DIR}/drivers/smc
+ ${SDK_DIR}/drivers/uart
+ )
+ update_board(${BOARD_TARGET})
 
- # LD_FILE and STARTUP_FILE can be defined in board.cmake
+ # LD_FILE and STARTUP_FILE can be defined in board.cmake
+ target_sources(${BOARD_TARGET} PUBLIC
+ ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+ )
 
- target_sources(${BOARD_TARGET} PUBLIC
- ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+ if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_GNU}"
+ # nanolib
+ --specs=nosys.specs --specs=nano.specs
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--config=${LD_FILE_IAR}"
  )
-
- if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
- target_link_options(${BOARD_TARGET} PUBLIC
- "LINKER:--script=${LD_FILE_GNU}"
- # nanolib
- --specs=nosys.specs
- --specs=nano.specs
- )
- elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
- target_link_options(${BOARD_TARGET} PUBLIC
- "LINKER:--config=${LD_FILE_IAR}"
- )
- endif ()
  endif ()
 endfunction()
 

hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c

@@ -37,7 +37,7 @@ void USB_IRQHandler(void)
  #endif
 
  #if CFG_TUH_ENABLED
- tuh_int_handler(0);
+ tuh_int_handler(0, true);
  #endif
 }
 

hw/bsp/lpc17/boards/mbed1768/mbed1768.c

@@ -151,7 +151,7 @@ void USB_IRQHandler(void)
  #endif
 
  #if CFG_TUH_ENABLED
- tuh_int_handler(0);
+ tuh_int_handler(0, true);
  #endif
 }
 

hw/bsp/lpc18/family.c

@@ -43,25 +43,23 @@
 //--------------------------------------------------------------------+
 // USB Interrupt Handler
 //--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
+void USB0_IRQHandler(void) {
  #if PORT_SUPPORT_DEVICE(0)
-  tud_int_handler(0);
+ tud_int_handler(0);
  #endif
 
  #if PORT_SUPPORT_HOST(0)
-  tuh_int_handler(0);
+ tuh_int_handler(0, true);
  #endif
 }
 
-void USB1_IRQHandler(void)
-{
+void USB1_IRQHandler(void) {
  #if PORT_SUPPORT_DEVICE(1)
-  tud_int_handler(1);
+ tud_int_handler(1);
  #endif
 
  #if PORT_SUPPORT_HOST(1)
-  tuh_int_handler(1);
+ tuh_int_handler(1, true);
  #endif
 }
 
@@ -74,28 +72,26 @@ const uint32_t OscRateIn = 12000000;
 const uint32_t ExtRateIn = 0;
 
 // Invoked by startup code
-void SystemInit(void)
-{
+void SystemInit(void) {
 #ifdef __USE_LPCOPEN
- extern void (* const g_pfnVectors[])(void);
+ extern void (*const g_pfnVectors[])(void);
  unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
- *pSCB_VTOR = (unsigned int) g_pfnVectors;
+ *pSCB_VTOR = (unsigned int) g_pfnVectors;
 #endif
 
  board_lpc18_pinmux();
 
- #ifdef TRACE_ETM
+#ifdef TRACE_ETM
  // Trace clock is limited to 60MHz, limit CPU clock to 120MHz
  Chip_SetupCoreClock(CLKIN_CRYSTAL, 120000000UL, true);
- #else
+#else
  // CPU clock max to 180 Mhz
  Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);
- #endif
+#endif
 
 }
 
-void board_init(void)
-{
+void board_init(void) {
  SystemCoreClockUpdate();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
@@ -135,27 +131,22 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
  Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
  // active low
  return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
+int board_uart_read(uint8_t *buf, int len) {
  return Chip_UART_Read(UART_DEV, buf, len);
 }
 
-int board_uart_write(void const * buf, int len)
-{
- uint8_t const* buf8 = (uint8_t const*) buf;
- for(int i=0; i<len; i++)
- {
+int board_uart_write(void const *buf, int len) {
+ uint8_t const *buf8 = (uint8_t const *) buf;
+ for (int i = 0; i < len; i++) {
  while ((Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0) {}
  Chip_UART_SendByte(UART_DEV, buf8[i]);
  }
@@ -165,13 +156,13 @@ int board_uart_write(void const * buf, int len)
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
  system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
  return system_ticks;
 }
+
 #endif

hw/bsp/lpc40/family.c

@@ -37,7 +37,7 @@ void USB_IRQHandler(void) {
  #endif
 
  #if CFG_TUH_ENABLED
- tuh_int_handler(0);
+ tuh_int_handler(0, true);
  #endif
 }
 

hw/bsp/lpc43/family.c

@@ -213,7 +213,7 @@ void USB0_IRQHandler(void)
  #endif
 
  #if PORT_SUPPORT_HOST(0)
- tuh_int_handler(0);
+ tuh_int_handler(0, true);
  #endif
 }
 
@@ -224,7 +224,7 @@ void USB1_IRQHandler(void)
  #endif
 
  #if PORT_SUPPORT_HOST(1)
- tuh_int_handler(1);
+ tuh_int_handler(1, true);
  #endif
 }