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SystemVerilog
SystemVerilog PublicFundamentals, OOPS, Randomization, IPC. Tool used is EDA Playground -> Aldec Riviera Pro 2022.04.
SystemVerilog 1
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Ling-Adder-64-bit
Ling-Adder-64-bit PublicA Ling adder is a particularly fast binary adder designed using H. Ling's equations.
Verilog 1
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MOS_Capacitor
MOS_Capacitor PublicFor a given file consisting of capacitor and gate voltage, it calculates the slope of the desired depletion region of 1/C^2 vs. gate voltage.
Jupyter Notebook 1
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