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  1. riscv-zedern riscv-zedern Public

    A RISCV test implementation targetted at the iCE40 HX8K FPGA

    Verilog

  2. bicantor bicantor Public

    A superscalar RISC-V implementation

    Verilog 4 1

  3. lock-flow lock-flow Public

    Lock insertion schemes for use in an FPGA logic locking flow.

    Python 3 2

  4. branch-predictor branch-predictor Public

    Simulation of various branch-prediction methods.

    Python 1

  5. music-player music-player Public

    A modular terminal interface music player.

    Python 1