XLS: Accelerated HW Synthesis

📔🌼 An example website/book created with Pollen.

The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.

Firrtl Syntax highlighting, Code folding and Navigate to corresponding Chisel code

https://www.kurims.kyoto-u.ac.jp/~ooura/fft.html

Various tests and examples for attaching DSP blocks created using dsp-tools in Chisel to a Rocket Core

Questions to ask the company during your interview

by ex-googlers, for ex-googlers - a lookup table of similar tech & services

Flexible Intermediate Representation for RTL

The Scala 3 compiler, also known as Dotty.

For contributions of Chisel IP to the chisel community.

Professional Radio Station App for iOS!

Chisel/Firrtl execution engine

180+ Algorithm & Data Structure Problems using C++

A Lisp interpreter for Raspberry Pi implemented in a single ARM assembly file

Python programs, usually short, of considerable difficulty, to perfect particular skills.