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darkriscv Public
Forked from darklife/darkriscvopensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Verilog BSD 3-Clause "New" or "Revised" License UpdatedMay 17, 2024 -
scr1 Public
Forked from syntacore/scr1SCR1 is a high-quality open-source RISC-V MCU core in Verilog
SystemVerilog Other UpdatedDec 16, 2022 -
biriscv Public
Forked from ultraembedded/biriscv32-bit Superscalar RISC-V CPU
Verilog Apache License 2.0 UpdatedSep 21, 2020 -
fucking-algorithm Public
Forked from labuladong/fucking-algorithm手把手撕LeetCode题目,扒各种算法套路的裤子。English version supported! Crack LeetCode, not only how, but also why.
UpdatedMay 18, 2020 -
crypto Public
Forked from golang/crypto[mirror] Go supplementary cryptography libraries
Go BSD 3-Clause "New" or "Revised" License UpdatedNov 19, 2019 -
wycheproof Public
Forked from C2SP/wycheproofProject Wycheproof tests crypto libraries against known attacks.
Java Apache License 2.0 UpdatedOct 9, 2019 -
ipv6toolkit Public
Forked from fgont/ipv6toolkitSI6 Networks' IPv6 Toolkit
C GNU General Public License v3.0 UpdatedApr 10, 2019 -
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Arquitectura-de-Computadores Public
Forked from TEAM-PROCESSOR/Arquitectura-de-ComputadoresDesign ARM LEGv8 Architecture
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CPU-2 Public
Forked from babys-first-processor/CPU64-bit ARM processor for Computer Architecture course at Rowan University
Verilog MIT License UpdatedFeb 28, 2019 -
arm-foss Public
Forked from avahidi/arm-fossnote: this is a github copy of a hardware project hosted on bitbucket.
Verilog GNU General Public License v3.0 UpdatedFeb 27, 2019 -
Piplined-MIPS-CPU-Simulator Public
Forked from Kalesh-Singh/Piplined-MIPS-CPU-SimulatorC UpdatedFeb 26, 2019 -
cryptotest Public
Forked from montjoie/cryptotestTools for testing kernel ciphers and hash algorithm
C GNU General Public License v2.0 UpdatedFeb 1, 2019 -
Image-Processing-Pipline Public
Forked from kaitlynwright/Image-Processing-PiplineC/C++ & Unix
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Flute Public
Forked from bluespec/FluteRISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
Verilog Apache License 2.0 UpdatedJan 22, 2019 -
ARMv8_Pipeline Public
Forked from Jordi-Jaspers/ARMv8_PipelineAn Arm V8 processor with pipelining made via the instructions of the ARM-Edition book written by David A. Patterson & John L. Hennesey
Verilog MIT License UpdatedDec 31, 2018 -
pipline_MIPS Public
Forked from EriccLiu/pipline_MIPSA experiment for Computer Organization and System Structure, using Verilog
C UpdatedDec 6, 2018 -
ETeam Public
Forked from TeamvisionCorp/TeamVisionETeam软件工程协作工具
JavaScript GNU General Public License v2.0 UpdatedNov 15, 2018 -
icicle Public
Forked from grahamedgecombe/icicle32-bit RISC-V system on chip for iCE40 FPGAs
SystemVerilog ISC License UpdatedOct 27, 2018 -
argo Public
Forked from t-crest/argoArgo is a time-division multiplexing network-on-chip.
Verilog UpdatedOct 24, 2018 -
ice-chips-verilog Public
Forked from TimRudy/ice-chips-verilogIceChips is a library of all common discrete logic devices in Verilog
Verilog GNU General Public License v3.0 UpdatedOct 24, 2018 -
NeoGeoFPGA-sim Public
Forked from neogeodev/NeoGeoFPGA-simSimulation only cartridge NeoGeo hardware definition
Verilog GNU General Public License v3.0 UpdatedOct 18, 2018 -
CycloneTCP Public
Forked from Oryx-Embedded/CycloneTCPDual IPv4/IPv6 Stack
C GNU General Public License v2.0 UpdatedSep 11, 2018 -
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lnst Public
Forked from LNST-project/lnstLinux Network Stack Test
Python GNU General Public License v2.0 UpdatedAug 22, 2018 -
NPU_on_FPGA Public
Forked from cxdzyq1110/NPU_on_FPGA在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。
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30dayMakeOS Public
Forked from yourtion/30dayMakeOS《30天自制操作系统》源码中文版。自己制作一个操作系统(OSASK)的过程
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pcie_rgmii Public
Forked from 276921237/pcie_rgmiiPCIE网卡项目,实现网口数据精确时间戳上报
Verilog UpdatedAug 5, 2018 -
mts Public
Forked from ericsson-mts/mtsProject of Multi-protocol Test Tool opensourced by Ericsson
Java GNU General Public License v3.0 UpdatedAug 3, 2018 -