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Dustbin have been important part of our life. But, the issue we have to deal is its open cap. Due to this open cap, insect and flies visit the garbage and also the same flies roam around out kitche…

C++ 1 Updated Sep 7, 2020

An expert system that suggest best options for fishery process and Maritime trade in iran.

CLIPS 3 Updated Feb 14, 2017

Classic Rook and King Chess End Game ( An Expert System based on Adverserial Search )

CLIPS 3 4 Updated Jul 2, 2017

In this research, we developed a car detection system by utilizing the Histogram of Oriented Gradients (HOG) feature extraction technique on car images. Utilized a Convolutional Neural Network (CNN…

Jupyter Notebook 1 Updated Jul 15, 2023

Car Diagnostic Dialogue: A CLIPS-Based Expert System for Car Troubleshooting

CLIPS 1 Updated Oct 10, 2023

Using ChatGPT on the ESP8266 with the OpenAI API

C++ 11 1 Updated May 1, 2023

The library for ESP OTA Dashboard supports both ESP8266 and ESP32.

C++ 8 4 Updated Aug 6, 2023

Flipper Zero Clone using ESP8266

C++ 72 5 Updated Mar 26, 2023

A FOSS bitcoin miner for ESP8266 and ESP32

C 75 13 Updated Oct 2, 2024

FPGA based MIDI keyboard project for EEE 304 (Digital Electronics Laboratory)

Verilog 9 1 Updated Sep 21, 2022

This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs to construct the 4-bit ADC based on the flash architecture. …

MATLAB 12 5 Updated Apr 20, 2019

Final Electrical Engineering Capstone Project: Research and Design of Low Power SRAM using Cadence Virtuoso

SourcePawn 5 Updated Jul 24, 2022

This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) implemented in 45nm CMOS technology.

137 18 Updated Mar 3, 2024

The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout design is done using Cadence Virtuoso’s ADE, & the Static N…

MATLAB 61 8 Updated Aug 7, 2022

This is this VLSI designing Project. This Project is created in Cadence Virtuoso. See the PDF for Pre-Post layout results and other details

14 6 Updated Mar 22, 2019

Machine learning approach inspired by biological brain organoids playing pong.

Python 1 Updated Jan 9, 2024

A collection of IC design projects while attending final semester at Boise State University. All projects were simulated using Cadence.

2 1 Updated Jun 26, 2016

IC design project of an Operational Amplifier. Schematic and Layout of the analog design. Op-Amp has a gain of 900 V/V. Designed using 5um technology in Cadence Virtuoso

5 2 Updated Oct 21, 2019

Schematic, Layout Design & Simulation in 180nm Technology

15 2 Updated Nov 21, 2020