Various bugfixes for aligned/simd codepaths

[borodust]

Configuration those were discovered with:

#define GLM_FORCE_MESSAGES
#define GLM_FORCE_INLINE
#define GLM_FORCE_DEFAULT_ALIGNED_GENTYPES
#define GLM_FORCE_AVX
#define GLM_FORCE_SINGLE_ONLY

Let me know, if tests are required for this PR.

[gottfriedleibniz]

Similar issue found in func_integer_simd.inl with compute_bitfieldReverseStep and compute_bitfieldBitCountStep:

diff --git a/glm/detail/func_integer_simd.inl b/glm/detail/func_integer_simd.inl
index 8be6c9ce..181afa04 100644
--- a/glm/detail/func_integer_simd.inl
+++ b/glm/detail/func_integer_simd.inl
@@ -22,7 +22,9 @@ namespace detail
 
 			__m128i const or0 = _mm_or_si128(sft1, sft2);
 
-			return or0;
+			vec<4, uint, Q> result;
+			result.data = or0;
+			return result;
 		}
 	};
 
@@ -39,7 +41,9 @@ namespace detail
 			__m128i const and1 = _mm_and_si128(sft0, set1);
 			__m128i const add0 = _mm_add_epi32(and0, and1);
 
-			return add0;
+			vec<4, uint, Q> result;
+			result.data = add0;
+			return result;
 		}
 	};
 }//namespace detail

christophe-lunarg could probably deal with this trivial change whenever the rest of the PR is looked at.

[borodust]

(I've pushed same commit again to retest)

[christophe-lunarg]

Thanks for contributing!