Starred repositories
A minimal GPU design in Verilog to learn how GPUs work from the ground up
This is a fork of Egzumer https://github.com/egzumer/uv-k5-firmware-custom
An open-source microcontroller system based on RISC-V
3D renderer for the STM32F0xx microcontrollers that displays its output on a SH1106 OLED screen
Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
❄️ Visual editor for open FPGA boards
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
Small and low cost FPGA educational and development board
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
A Fast, Low-Overhead On-chip Network
Open source minimal stack for the ch32 line of WCH processors, including the ch32v003, a 10¢ 48 MHz RISC-V Microcontroller - as well as many other chips within the ch32v/x line.
A Linux-capable RISC-V multicore for and by the world
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
The original sources of MS-DOS 1.25, 2.0, and 4.0 for reference purposes
A low-power E-Paper weather display powered by an ESP32 microcontroller. Utilizes the OpenWeatherMap API.
HackRF software and captures by everyone and for everyone. Argh matey.
Portability Add-On for the HackRF Software-Defined Radio.
Custom firmware for the HackRF+PortaPack H1/H2/H4
The next generation of OpenLane, rewritten from scratch with a modular architecture
