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Added NUCLEO_F070RB
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Supersede stm32duino#1167

Signed-off-by: Geoffrey Hunter <[email protected]>
Co-authored-by: Frederic.Pillon <[email protected]>
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gbmhunter and fpistm committed Mar 14, 2021
1 parent 73dde7f commit a40f709
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Showing 13 changed files with 1,734 additions and 2 deletions.
2 changes: 2 additions & 0 deletions README.md
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Expand Up @@ -88,6 +88,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| Status | Device(s) | Name | Release | Notes |
| :----: | :-------: | ---- | :-----: | :---- |
| :green_heart: | STM32F030R8 | [Nucleo F030R8](http:https://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | |
| :yellow_heart: | STM32F070RB | [Nucleo F070RB](http:https://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | **2.0.0** | |
| :green_heart: | STM32F072RB | [Nucleo F072RB](http:https://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | |
| :green_heart: | STM32F091RC | [Nucleo F091RC](http:https://www.st.com/en/evaluation-tools/nucleo-f091rc.html) | *0.1.0* | |
| :green_heart: | STM32F103RB | [Nucleo F103RB](http:https://www.st.com/en/evaluation-tools/nucleo-f103rb.html) | *0.2.0* | |
Expand Down Expand Up @@ -160,6 +161,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :yellow_heart: | STM32F042C4<br>STM32F042C6 | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F051K6U<br>STM32F051K8U | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F070CB | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F070RB | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F072C8<br>STM32F072CB | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F072R8<br>STM32F072RB | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F091RB<br>STM32F091RC | Generic Board | **2.0.0** | |
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20 changes: 20 additions & 0 deletions boards.txt
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Expand Up @@ -208,6 +208,18 @@ Nucleo_64.menu.pnum.NUCLEO_F030R8.build.product_line=STM32F030x8
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.variant=STM32F0xx/F030R8Tx
Nucleo_64.menu.pnum.NUCLEO_F030R8.build.cmsis_lib_gcc=arm_cortexM0l_math

# NUCLEO_F070RB board
Nucleo_64.menu.pnum.NUCLEO_F070RB=Nucleo F070RB
Nucleo_64.menu.pnum.NUCLEO_F070RB.node="NODE_F070RB,NUCLEO"
Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_size=131072
Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_data_size=16384
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.mcu=cortex-m0
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.board=NUCLEO_F070RB
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.series=STM32F0xx
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.product_line=STM32F070xB
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.variant=STM32F0xx/F070RBTx
Nucleo_64.menu.pnum.NUCLEO_F070RB.build.cmsis_lib_gcc=arm_cortexM0l_math

# NUCLEO_F072RB board
Nucleo_64.menu.pnum.NUCLEO_F072RB=Nucleo F072RB
Nucleo_64.menu.pnum.NUCLEO_F072RB.node="NODE_F072RB,NUCLEO"
Expand Down Expand Up @@ -949,6 +961,14 @@ GenF0.menu.pnum.GENERIC_F070CBTX.build.board=GENERIC_F070CBTX
GenF0.menu.pnum.GENERIC_F070CBTX.build.product_line=STM32F070xB
GenF0.menu.pnum.GENERIC_F070CBTX.build.variant=STM32F0xx/F070CBTx

# Generic F070RBTx
GenF0.menu.pnum.GENERIC_F070RBTX=Generic F070RBTx
GenF0.menu.pnum.GENERIC_F070RBTX.upload.maximum_size=131072
GenF0.menu.pnum.GENERIC_F070RBTX.upload.maximum_data_size=16384
GenF0.menu.pnum.GENERIC_F070RBTX.build.board=GENERIC_F070RBTX
GenF0.menu.pnum.GENERIC_F070RBTX.build.product_line=STM32F070xB
GenF0.menu.pnum.GENERIC_F070RBTX.build.variant=STM32F0xx/F070RBTx

# Generic F072C8Tx
GenF0.menu.pnum.GENERIC_F072C8TX=Generic F072C8Tx
GenF0.menu.pnum.GENERIC_F072C8TX.upload.maximum_size=65536
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36 changes: 34 additions & 2 deletions variants/STM32F0xx/F070RBTx/generic_clock.c
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Expand Up @@ -20,8 +20,40 @@
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
Error_Handler();
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;

if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
Error_Handler();
}
}

#endif /* ARDUINO_GENERIC_* */
177 changes: 177 additions & 0 deletions variants/STM32F0xx/F070RBTx/ldscript.ld
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@@ -0,0 +1,177 @@
/**
******************************************************************************
* @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE
* @brief Linker script for STM32F070RBTx Device from STM32F0 series
* 128Kbytes FLASH
* 16Kbytes RAM
*
* Set heap size, stack size and stack location according
* to application requirements.
*
* Set memory bank area and size if external memory is used
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */

_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH

/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH

.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH

.ARM : {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH

.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH

.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH

.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */

. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM AT> FLASH

/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM

/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}
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