FPGA Linux-enabled SoC supporting Wishbone4 and AXI4-Lite peripherals.

CPU implements following features:

• Instruction & Data Caches, n-way configurable.
• Pipelined Hardware Multiplication & Division.
• Pipelined Hardware Floating-Point Addition, Substraction, Multiplication & Division.
• MMU (Memory Management Unit) with Hardware Filled TLB (Translation Lookaside Buffer) n-way configurable.

SOC includes following peripherals:

• HDMI/VGA FrameBuffer.
• GPIO (General Purpose Input/Output).
• Interrupt controller.
• SD-Card controller supporting MMC, SDSC, SDHC and SDXC Cards.
• LiteDRAM supporting DDR2 DDR3 SDRAM.
• UART.

• Download disk image, decompress and flash it to an sdcard using either dd if=pu32-vmlinux.img of=/dev/<sdx> bs=1M oflag=sync status=progress or BalenaEtcher
• Download FPGA bitstream: Genesys2, NexysA7, NexysVideo, Orangecrab0225, Orangecrab0285
• Flash FPGA bitstream: Genesys2, NexysA7, NexysVideo, Orangecrab02
  • Genesys2 NexysA7 NexysVideo can flash themselves from a .bit file placed in the sdcard FAT32 partition.
  • Orangecrab0285: flash using dfu-util --alt 0 -D orangecrab0285.dfu
  • Orangecrab0225: flash using dfu-util -D orangecrab0225.dfu
• Connect to serial port using 115200n8

• Linux booting on NexysA7

• Sources and build instructions: PU32
• Documentation