Submitting the Rust libstd patches for review #14
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From the meeting we addressed a few of these topics. OS optionsThe selected CPU choiceXtensa has too many features to gate behind cpu attributes (like riscv), therefore each target has to be separate with its unique There is a caveat to this approach which will need to be solved - we need a way to enable or disable atomic generation in llvm, even if the underlying target does not support it (esp32s2). Linker & Linker sections
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Closing, this is now tracked here. |
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STD support for the ESP-IDF framework Dear all, This PR is implementing libStd support for the [ESP-IDF](https://github.com/espressif/esp-idf) newlib-based framework, which is the open source SDK provided by Espressif for their MCU family (esp32, esp32s2, esp32c3 and all other forthcoming ones). Note that this PR has a [sibling PR](rust-lang/libc#2310) against the libc crate, which implements proper declarations for all ESP-IDF APIs which are necessary for libStd support. # Implementation approach The ESP-IDF framework - despite being bare metal - offers a relatively complete POSIX API based on newlib. `pthread`, BSD sockets, file descriptors, and even a small file-system VFS layer. Perhaps the only significant exception is the lack of support for processes, which is to be expected of course on bare metal. Therefore, the libStd support is implemented as a set of (hopefully small) changes to the `sys/unix` family of modules, in the form of conditional-compilation branches based either on `target_os = "espidf"` or in a couple of cases - based on `target_env = "newlib"` (the latter was already there actually and is not part of this patch). The PR also contains two new targets: - `riscv32imc-esp-espidf` - `riscv32imac-esp-espidf` ... which are essentially copies of `riscv32imc-unknown-none-elf` and `riscv32imac-unknown-none-elf`, but enriched with proper `linker`, `linker_flavor`, `families`, `os`, `env` etc. specifications so that (a) the proper conditional compilation branches in libStd are selected when compiling with these targets and (b) the correct linker is used. Since support for atomics is a precondition for libStd, the `riscv32imc-esp-espidf` target additionally is configured in such a way, so as to emit libcalls to the `__sync*` & `__atomic*` GCC functions, which are already implemented in the ESP-IDF framework. If this modification is not acceptable, we can also live with only the `riscv32imac-esp-espidf` target as well. While the RiscV chips of Espressif lack native atomics support, the relevant instructions are transparently emulated in the ESP-IDF framework using invalid instruction trap. This modification was implemented specifically with Rust support in mind. # Target maintainers In case this PR eventually gets merged, you can list myself as a Target Maintainer. More importantly, Espressif (the chip vendor) is now actively involved and [embracing](https://github.com/espressif/rust-esp32-example/blob/main/docs/rust-on-xtensa.md) all [Rust-related efforts](https://github.com/esp-rs) which were originally a community effort. In light of that, I suppose `@MabezDev` - who initiated the Rust-on-Espressif efforts back in time and who now works for Espressif won't object to being listed as a maintainer as well. **EDIT:** I was hinted (thanks, `@Urgau)` that answering the Tier 3 policy explicitly might be helpful. Answers below. # Tier 3 Target Policy - answers > A proposed target or target-specific patch that substantially changes code shared with other targets (not just target-specific code) must be reviewed and approved by the appropriate team for that shared code before acceptance. Hopefully, the changes introduced by the ESP-IDF libStd support are rather on the small side. They are completely contained within the `sys/unix` set of modules (that is, aside from the obviously necessary one-liners in the `unwind` crate and in `build.rs`). > A tier 3 target must have a designated developer or developers (the "target maintainers") on record to be CCed when issues arise regarding the target. (The mechanism to track and CC such developers may evolve over time.) `@ivmarkov` `@MabezDev` > Targets must use naming consistent with any existing targets; for instance, a target for the same CPU or OS as an existing Rust target should use the same name for that CPU or OS. Targets should normally use the same names and naming conventions as used elsewhere in the broader ecosystem beyond Rust (such as in other toolchains), unless they have a very good reason to diverge. Changing the name of a target can be highly disruptive, especially once the target reaches a higher tier, so getting the name right is important even for a tier 3 target. The two introduced targets follow as much as possible the naming conventions of the other targets. I.e. taking the bare-metal `riscv32imac_unknown_none_elf` as a base: * The name of the new target was derived by replacing `none` with `espidf` to designate the `target_os`. * `_elf` was removed, as the non-bare metal targets seem not to have it * `-newlib` was deliberately NOT added at the end, as I believe the chance of having two simultaneously active separate targets for the ESP-IDF framework with different C libraries (say, newlib vs musl) is way too small * Finally, we replaced the middle `unknown` with `esp` which is kind of the name of the whole chipset MCU family (and abbreviation from Espressif which is too long). It will stay `esp` for all RiscV32-based MCUs of the company, as they all use the riscv32imc instruction set. By necessity however (disambiguation), it will be `esp32` or `esp32s2` or `esp32s3` for the Xtensa-based MCUs as all of these have their own variation of the Xtensa architecture. (The Xtensa targets are not part of this PR, even though they would use 1:1 the same LibStd implementation provided here, as they depend on the upstreaming of the Xtensa architecture support in LLVM; this upstreaming this is currently in progress.) There was also a preceding discussion on the topic [here](espressif/rust-esp32-example#14). > Target names should not introduce undue confusion or ambiguity unless absolutely necessary to maintain ecosystem compatibility. For example, if the name of the target makes people extremely likely to form incorrect beliefs about what it targets, the name should be changed or augmented to disambiguate it. We are explicitly putting an `-espidf` suffix to designate that the target is *specifically* for Rust + ESP-IDF > Tier 3 targets may have unusual requirements to build or use, but must not create legal issues or impose onerous legal terms for the Rust project or for Rust developers or users. Agreed. > The target must not introduce license incompatibilities. To the best of our knowledge, it doesn't. > Anything added to the Rust repository must be under the standard Rust license (MIT OR Apache-2.0). MIT + Apache 2.0 > The target must not cause the Rust tools or libraries built for any other host (even when supporting cross-compilation to the target) to depend on any new dependency less permissive than the Rust licensing policy. This applies whether the dependency is a Rust crate that would require adding new license exceptions (as specified by the tidy tool in the rust-lang/rust repository), or whether the dependency is a native library or binary. In other words, the introduction of the target must not cause a user installing or running a version of Rust or the Rust tools to be subject to any new license requirements. Requirements are not changed for any other target. > If the target supports building host tools (such as rustc or cargo), those host tools must not depend on proprietary (non-FOSS) libraries, other than ordinary runtime libraries supplied by the platform and commonly used by other binaries built for the target. For instance, rustc built for the target may depend on a common proprietary C runtime library or console output library, but must not depend on a proprietary code generation library or code optimization library. Rust's license permits such combinations, but the Rust project has no interest in maintaining such combinations within the scope of Rust itself, even at tier 3. The targets are for bare-metal environment which is not hosting build tools or a compiler. > Targets should not require proprietary (non-FOSS) components to link a functional binary or library. The linker used by the targets is the GCC linker from the GCC toolchain cross-compiled for riscv. GNU GPL. > "onerous" here is an intentionally subjective term. At a minimum, "onerous" legal/licensing terms include but are not limited to: non-disclosure requirements, non-compete requirements, contributor license agreements (CLAs) or equivalent, "non-commercial"/"research-only"/etc terms, requirements conditional on the employer or employment of any particular Rust developers, revocable terms, any requirements that create liability for the Rust project or its developers or users, or any requirements that adversely affect the livelihood or prospects of the Rust project or its developers or users. > Neither this policy nor any decisions made regarding targets shall create any binding agreement or estoppel by any party. If any member of an approving Rust team serves as one of the maintainers of a target, or has any legal or employment requirement (explicit or implicit) that might affect their decisions regarding a target, they must recuse themselves from any approval decisions regarding the target's tier status, though they may otherwise participate in discussions. > This requirement does not prevent part or all of this policy from being cited in an explicit contract or work agreement (e.g. to implement or maintain support for a target). This requirement exists to ensure that a developer or team responsible for reviewing and approving a target does not face any legal threats or obligations that would prevent them from freely exercising their judgment in such approval, even if such judgment involves subjective matters or goes beyond the letter of these requirements. Agreed. > Tier 3 targets should attempt to implement as much of the standard libraries as possible and appropriate (core for most targets, alloc for targets that can support dynamic memory allocation, std for targets with an operating system or equivalent layer of system-provided functionality), but may leave some code unimplemented (either unavailable or stubbed out as appropriate), whether because the target makes it impossible to implement or challenging to implement. The authors of pull requests are not obligated to avoid calling any portions of the standard library on the basis of a tier 3 target not implementing those portions. The targets implement libStd almost in its entirety, except for the missing support for process, as this is a bare metal platform. The process `sys\unix` module is currently stubbed to return "not implemented" errors. > The target must provide documentation for the Rust community explaining how to build for the target, using cross-compilation if possible. If the target supports running tests (even if they do not pass), the documentation must explain how to run tests for the target, using emulation if possible or dedicated hardware if necessary. Target does not (yet) support running tests. We would gladly provide all documentation how to build for the target (where?). It is currently hosted in this [README.md](https://github.com/ivmarkov/rust-esp32-std-hello) file, but will likely be moved to the [esp-rs](https://github.com/esp-rs) organization. Since the build for the target is driven by cargo and [all other tooling is downloaded automatically during the build](https://github.com/esp-rs/esp-idf-sys/blob/master/build.rs), there is no need for extensive documentation. > Tier 3 targets must not impose burden on the authors of pull requests, or other developers in the community, to maintain the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on a tier 3 target. Do not send automated messages or notifications (via any medium, including via `@)` to a PR author or others involved with a PR regarding a tier 3 target, unless they have opted into such messages. Agreed. > Backlinks such as those generated by the issue/PR tracker when linking to an issue or PR are not considered a violation of this policy, within reason. However, such messages (even on a separate repository) must not generate notifications to anyone involved with a PR who has not requested such notifications. Agreed. > Patches adding or updating tier 3 targets must not break any existing tier 2 or tier 1 target, and must not knowingly break another tier 3 target without approval of either the compiler team or the maintainers of the other tier 3 target. To the best of our knowledge, we believe we are not breaking any other target (be it tier 1, 2 or 3). > In particular, this may come up when working on closely related targets, such as variations of the same architecture with different features. Avoid introducing unconditional uses of features that another variation of the target may not have; use conditional compilation or runtime detection, as appropriate, to let each target run code supported by that target. To the best of our knowledge, we have not introduced any unconditional use of a feature that affects any other target. > If a tier 3 target stops meeting these requirements, or the target maintainers no longer have interest or time, or the target shows no signs of activity and has not built for some time, or removing the target would improve the quality of the Rust codebase, we may post a PR to remove it; any such PR will be CCed to the target maintainers (and potentially other people who have previously worked on the target), to check potential interest in improving the situation. Agreed.
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(This one is going to be long, please bear with me.)
As discussed on the last meeting, we should initiate this process to get early feedback from the Rust maintainers.
I think the process will run more smoothly, if we narrow down first what the names and the parameters of the Rust compiler targets for ESP-IDF would be.
This is relevant even for the C3 chip, because even though there are already two riscv32 targets in the Rust compiler
riscv32imc_unknown_none_elf- without atomics - andriscv32imac_unknown_none_elf- with atomics),these are naked - or "bare metal" if you wish - in that they have no configuration specifying the following properties:
os_familyosenvvendorHaving the above properties properly defined is very important, because all the "#ifdefs" in Rust's libstd (and Rust's libc crate for that matter) for supporting ESP-IDF are based on those.
Additionally, there are three more properties that we might want to define/correct:
linker_flavorlinkercpuThese properties are not used by libstd, but we should have a story for these too.
linker_flavor&linkerproperties instruct Rust which linker should be usedcpu... I'm not sure. It seems to be somehow used/passed down to llvm (?). I'll comment on it further below.Proposal
Summary:
I have an opinion on
os_family,env,osandvendor.I'm not so sure about
linker,linker_flavor,cpuand the target names.os_familyNot very many options here. This one MUST be set to "unix" so that libstd is re-using its code-paths which are unix/posix compatible. The other options are "windows" (obviously not an option) and None - which is also obviously not an option.
envenvis basically the name of the C library used. Since ESP-IDF is based on "newlib" we should set it to "newlib". Arguments similar toos_family- reusing already existing code etc. etc.os(E.g. as in "linux", "android", "windows", "darwin" etc.)
This is a tricky one. Is ESP-IDF an OS? Yes and no... Some options:
At a first glance, option 1 ("none"), or option 2 ("freertos") look like the natural choice. ESP-IDF does not have a "kernel"
so in a way the OS is ether "none" indeed, or if we squint a little - perhaps "freertos".
The major problem I have with these two options (I'm currently using "none" in the libstd patches) is that these are not very useful.
While they might be reflecting the status quo, the primary purpose of the "os" property is so that you can branch the libstd Rust code on it (that is, whenever the behavior/patch is more specific and you can't just branch by os_family = "unix" and env = "newlib"; admittedly, these cases are rare, but they DO exist).
I simply cannot do it by os = "none" because lots of other targets might have os = "none", and I'm currently over-using the "vendor" property, which IMO is not such a great idea (see below).
Or to put it another way, there is a reason why the Android support is modelled with os = "android" and not with os = "linux". It is just more useful for branching.
Therefore, I suggest that we are using os = "espidf".
vendorCurrently, I'm using "espressif" for that one and I think that's Okay. Once/if we switch "os" to "espidf" the usage of the
vendorproperty in Rust libstd should disappear completely (I hope).cpuThis should reflect the CPU of the target platform. It is not used for branching in libstd but seems to be passed down to LLVM somehow (?).
The status quo with @MabezDev is that he is setting the
cputo match the MCU name (except for the esp32-c3, where I had to keep thecpuequal to "generic-rv32" because the Rust compiler complained otherwise).My suggestion is to use the MCU name for
cpuwhenever possible, i.e.What is important is to keep the "separate target per Espressif MCU policy".
So far, a new Espressif MCU also meant a new/extended instruction set (i.e. esp32 vs esp32s2 vs esp32s3; not sure for esp32c3 vs esp32c6 though) so that's kind of natural.
Separate Rustc target per Espressif MCU has the benefit of having "good" settings for the
linkerandlinker_flavourproperties below.linker&linker_flavorThese should follow the name and linker nature of the Espressif toolchain for the concrete MCU. I.e.:
linker_flavor= "LinkerFlavor::Gcc" (always)linker= "xtensa-esp32-elf-gcc" (for esp32)linker= "xtensa-esp32s2-elf-gcc" (for esp32s2)linker= "xtensa-esp32s3-elf-gcc" (for esp32s3)linker= "riscv32-esp-elf-gcc" (for esp32c3)linker= "riscv32-esp-elf-gcc?" (for esp32c6? or?)Target name (not that important)
Currently, the names of the Rust ESP-IDF (std) targets are as follows (note that the naming convention described here seems to be only loosely followed in general, so we have relative freedom):
I think that's mostly a good convention, but we might want to simplify the prefix of c3 (and future c6) to simply "riscv32" and possibly include "espidf" and "newlib" to reflect that
these use espidf and newlib:
I suggest we change them to:
Now, if we plan to re-use the same targets for linking against ESP-IDF as well as for bare metal, we can just keep the existing names. Reusing the same targets for "bare metal" and for ESP-IDF is possible, because "bare metal" does not care about the additional properties we define for branching in libstd.
However, the re-use of the same targets for ESP-IDF vs pure "bare metal" might be a bit problematic in regards to atomics, for targets that do not support those like ESP32S2 and ESP32C3:
For pure "bare metal", we need to define the target with:
And for ESP-IDF, we have to define:
... and possibly change the
cpuof the esp32s2 ESP-IDF target to beesp32and notesp32s2, so that atomics instructions are generated. Ditto for the esp32c3 ESP-IDF target, where we need to add the "+a" feature.The text was updated successfully, but these errors were encountered: