A Java library for fast symbolic-numeric computation

A small and simple 8-bit CPU built in Logisim. The project also includes an assembler and a manual for those who want to learn how a processor works.

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Verilog-A simulation models

XCircuit circuit drawing and schematic capture tool

In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.

ecad for the ADALM1000

Bundletool is a command-line tool to manipulate Android App Bundles

Beam: Scalable Confidential Cryptocurrency. Leading the way to Confidential DeFi

2GHz single-ended active probe design

Low cost USB3.2Gen1 HDMI-USB Video Acquisition With Loop Out (Loop Out HDMI Capture Card) base on MS2130 & MS9332

a custom board to monitor custom battery packs

A minimal GPU design in Verilog to learn how GPUs work from the ground up

Visual Simulation of Register Transfer Logic

Tiny Tapeout 05 Submission for ASIC tapeout. This design is a computer from Malvino and Brown (SAP-1 architecture) built into an ASIC and sent to fabrication. The goal is to put hands on experience…

A browser-based SPICE circuit simulator

List of awesome open source hardware tools, generators, and reusable designs

JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

MATLAB toolbox for interfacing with the Cadence Virtuoso IC Design System

CMOS inverter schematic and layout design and analysis utilizing the skywater 130 nm pdk and numerous open source tools such as Xschem, NGSPICE, MAGIC, Netgen, and so on.

Library of open source Process Design Kits (PDKs)

This repository in a walk through the entire process of PLL IC designing from the tools to the final tapeout.

Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns

This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In this project, a PicoRV32a SoC is taken and then the RTL to GDSI…

Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools

130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design

PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.

KLayout Main Sources

A python3 gm/ID starter kit