Support for GOARCH=mips64 #8

clktmr · 2024-06-23T05:32:49Z

Follow up to #6

Changes since last push:

Rebase to master-embedded
Removed all MIPS-III related "Revert ..." commits
Fixed all errors in all.bash
Removed dependency to n64 module, use go:linkname instead
Implemented cachemaint and irqctl syscalls

Tested with latest n64 module ~~(cd8534ed58561a61701f3305f5ea2644b795eb31)~~ (c0dccb15ff67961f321c5ebeae119359c9e33521)

Saving, restoring context and switching to the ISR goroutine (cpu0.gh) seems to work so far. Only syscalls and interrupts are handled so far. See TODOs for next steps.

The COMPARE register was only used because of a bug in MAME which doesn't exist anymore in newer versions. Moreover this implementation could result in a deadlock because the scheduler also sets this register.

Don't call the scheduler and enable exceptions in the user handler, it might call the scheduler.

This commit breaks external interrupt handling. Will be fixed in the next one.

michalderkacz

PR7 "Fixes from n64 branch" can be probably removed because this one contains the
same fixes.

michalderkacz · 2024-06-24T20:35:23Z

src/cmd/link/internal/ld/deadcode.go

+ first, last = 1, 5
+ // runtime.unhandledExternalInterrupt is also a handler.
+ // Must be called somewhere in the code, otherwise it
+ // gets removed without error and relocs point to 0x0.


Can't you add the "runtime.unhandledExternalInterrupt" to the names here to avoid this "calling somewhere" need? Maybe it's not enough but it's definitely handled somehow for the two other architectures.

I added it as you recommended. Not sure about the other GOARCHs. It's probably safe because it is called in externalInterruptHandler anyways, but while I was implementing this I ran into this error so I added the comment.

src/runtime/const_noos_n64.go

michalderkacz · 2024-06-24T21:19:20Z

src/runtime/const_noos_n64.go

+ noosNumStackOrders = 3
+ noosHeapAddrBits = 23 // enough for 8 MiB K210 SRAM
+ noosLogHeapArenaBytes = 17 // 128 KiB
+ noosArenaBaseOffset = 0x0


Does TLB is configured to start RAM at 0x0?

src/runtime/mksizeclasses_mcu.go

src/runtime/rt0_noos_mips64.go

src/runtime/tasker_noos.go

src/runtime/tasker_noos_mips64.go

See embeddedgo#8

michalderkacz

I found bugs in meminit.
I thought a bit the concept of the default timer and think that we should stay with stopped time until proper timer is initialized (see comments).

src/embedded/rtos/irq_noos_mips64.go

src/runtime/mem_noos.go

michalderkacz · 2024-06-25T18:46:14Z

src/runtime/mem_noos.go

+ // the non-DMA memory, properly align the arena
+ arenaSize := freeSize - uintptr(pallocInFree)
+ arenaSize &= ^(uintptr(heapArenaBytes) - 1)
+ arenaStart := freeEnd - arenaSize


It doesn't look good to me.

You should probably start from: arenaStart = freeStart + pallocInFree
and next align the arenaStart address up to uintptr(heapArenaBytes)-1

Please have another look.

src/runtime/mem_noos.go

src/runtime/tasker_noos.go

Before clearing the memory via uncached access, all cache must be invalidated before. Otherwise a cache writeback could happen after clearing the memory.

The implementation of softwareInterruptHandler can't support nesting, as it must call the scheduler.

Regarding the TODO comment: Yes, newwork is set by another CPU. Doesn't matter at the moment, since only one core is supported.

This allows other archs to implement these in Go instead of assembly.

See embeddedgo#8

clktmr · 2024-06-30T02:17:09Z

PR7 "Fixes from n64 branch" can be probably removed because this one contains the same fixes.

I removed these commits from this branch. I think it's worth having the eventual merge only contain mips64 related changes.

To get mips64 support on the same level as the other archs, support for setprivlevel syscall and noostest need to be added. Anything else that I missed?

michalderkacz · 2024-07-02T12:35:51Z

To get mips64 support on the same level as the other archs, support for setprivlevel syscall and noostest need to be added. Anything else that I missed?

Hmm... I'm unsure. It will come out in the wash.

Just merged this PR locally and want to test it against emulated linux/mips64. I did some research and it looks like there is no easy to find any big-endian MIPS64 Linux distro that may run on Qemu. I ended up building the openwrt-malta-be64-vmlinux-initramfs.elf image right now, hoping that it will start with qemu-system-mips64 -cpu R4000. What should I try next if the R4000 will be incompatible with this OpenWRT image?

MIPS '4Kc'
MIPS '4Km'
MIPS '4KEcR1'
MIPS '4KEmR1'
MIPS '4KEc'
MIPS '4KEm'
MIPS '24Kc'
MIPS '24KEc'
MIPS '24Kf'
MIPS '34Kf'
MIPS '74Kf'
MIPS 'M14K'
MIPS 'M14Kc'
MIPS 'P5600'
MIPS 'mips32r6-generic'
MIPS 'I7200'
MIPS 'R4000'
MIPS 'VR5432'
MIPS '5Kc'
MIPS '5Kf'
MIPS '20Kc'
MIPS 'MIPS64R2-generic'
MIPS '5KEc'
MIPS '5KEf'
MIPS 'I6400'
MIPS 'I6500'
MIPS 'Loongson-2E'
MIPS 'Loongson-2F'
MIPS 'Loongson-3A1000'
MIPS 'Loongson-3A4000'
MIPS 'mips64dspr2'
MIPS 'Octeon68XX'

michalderkacz · 2024-07-02T14:38:18Z

Some files in this PR have no standard Go copyright header. Please add it.

Anything else that I missed?

MMIO intrinsics came to my mind but they are just optimization. Should have their own PR.

michalderkacz · 2024-07-11T11:44:17Z

Go tests pass on linux/mips64.

clktmr added 20 commits June 23, 2024 07:19

First steps for mips support

6a290ce

move entry function to beginning of text section

161c832

Implement _rt0_mips64_noos and rt0_go

ea7e39f

First draft for interrupt handler

79cc533

Saving, restoring context and switching to the ISR goroutine (cpu0.gh) seems to work so far. Only syscalls and interrupts are handled so far. See TODOs for next steps.

rework implementation of inthandler

2eca26e

Save a few cycles in creg access

0b8255e

Use SW interrupts for signaling newwork()

a323fd7

The COMPARE register was only used because of a bug in MAME which doesn't exist anymore in newer versions. Moreover this implementation could result in a deadlock because the scheduler also sets this register.

Simple default write for debugging

5a1361c

Support user interrupt vectors

55a6a27

Fix hardware interrupt handler

0eeeba5

Don't call the scheduler and enable exceptions in the user handler, it might call the scheduler.

Refactor inthandler in preparation for nested IRQ

08c9559

This commit breaks external interrupt handling. Will be fixed in the next one.

Reimplement context saving for external irqs

4cd51f9

Fix save/restoreGPRs by including R23

f412453

Save and restore status register

f76a49c

Remove broken setAlarm() implementation

f20c02f

Mitigate sign-extended pointers with TLB

ec1102e

Don't allow preempting the scheduler for now

499c820

Fix CP0 hazards of ERET

0ba3098

Declare interrupt handler in go files

0735c4b

Fix instruction for accessing boolean variable

ddb7e84

michalderkacz requested changes Jun 24, 2024

View reviewed changes

clktmr added a commit to clktmr/go that referenced this pull request Jun 25, 2024

Resolve minor review findings

f719868

See embeddedgo#8

clktmr added a commit to clktmr/go that referenced this pull request Jun 25, 2024

Resolve minor review findings

2e7d879

See embeddedgo#8

clktmr force-pushed the mips branch from f719868 to 2e7d879 Compare June 25, 2024 14:10

michalderkacz reviewed Jun 25, 2024

View reviewed changes

clktmr added 5 commits June 30, 2024 04:02

Increase space for non-heap allocations

c5f2c6c

Add dependency to target specific machine package

a0871ec

Remove incorrect uncached memory accesses

522c4b2

Before clearing the memory via uncached access, all cache must be invalidated before. Otherwise a cache writeback could happen after clearing the memory.

Use Go register notation

90d1c56

Implement meminit in Go instead of assembly

7e70a6a

clktmr added 20 commits June 30, 2024 04:02

Cleanup asm_mips64.h

b456b3f

Allow target specific unhandled exception handler

d91b545

Cleanup tasker implementation

580244a

Use only one of the two SW interrupts

85aec39

Consistent naming

0fcfaab

Rework nested exceptions

ff68f75

Handle fast syscalls properly

92ecc79

Improve documentation

0e93ef9

Make context restoration preemptable if possbile

2daae17

Remove unreachable code

7dbbef0

Allow nesting only for external interrupts

77e5f9a

The implementation of softwareInterruptHandler can't support nesting, as it must call the scheduler.

Initialize cpu to not use any ISA extensions

10ee6a2

Remove dependency to n64 module

8ae3c51

Fix errors reported by ./all.bash

6187830

Fix FPU context save in external interrupt

c06b29b

Regarding the TODO comment: Yes, newwork is set by another CPU. Doesn't matter at the moment, since only one core is supported.

Make function declarations arch dependent

dfc55b5

This allows other archs to implement these in Go instead of assembly.

Implement cachemaint syscall

5de02c6

Implement irqctl syscall

e85dca9

Resolve minor review findings

b0dc0af

See embeddedgo#8

Fix meminit() and other minor review findings

a1f914a

clktmr force-pushed the mips branch from 2e7d879 to a1f914a Compare June 30, 2024 02:04

michalderkacz merged commit c6aa1a2 into embeddedgo:master-embedded Jul 11, 2024

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Support for GOARCH=mips64 #8

Support for GOARCH=mips64 #8

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Support for GOARCH=mips64 #8

Support for GOARCH=mips64 #8

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