cofounder of rapidstream, phd candidate at ucla, tsinghua alumnus | eda researcher with full-stack experience on silicon, compiler, devops, hpc, algorithm, art
-
RapidStream & UCLA
- Santa Clara & Hong Kong
-
01:40
(UTC -07:00) - rapidstream-da.com
- https://orcid.org/0000-0003-0751-8227
Pinned Loading
-
rapidstream-org/rapidstream-cookbook
rapidstream-org/rapidstream-cookbook PublicTutorials and useful scripts for using RapidStream.
Verilog
-
rapidstream-org/rapidstream-dse
rapidstream-org/rapidstream-dse PublicDesign space exploration for RapidStream.
-
Xilinx/mlir-aie
Xilinx/mlir-aie PublicAn MLIR-based toolchain for AMD AI Engine-enabled devices.
-
heterorefactor/heterorefactor
heterorefactor/heterorefactor PublicHeteroRefactor: Refactoring for Heterogeneous Computing with FPGA
-
UCLA-VAST/AutoSA
UCLA-VAST/AutoSA PublicAutoSA: Polyhedral-Based Systolic Array Compiler
-
tuna/mirror-web
tuna/mirror-web PublicSource code of the web interface of https://mirrors.tuna.tsinghua.edu.cn/
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.