1.软件框架

boot/start.S

@@ -0,0 +1,154 @@
+.equ MEM_CTL_BASE, 0x48000000
+.equ SDRAM_BASE, 0x30000000
+.text
+.global _start
+#include "start.inc"
+_start:
+ b Reset @0x00
+ b Undef @0x04
+ b SWI @0x08
+ b P_abort @0x0C
+ b D_abort @0x10
+ b Reserved @0x14
+ b irq @0x18
+ b fiq
+
+/*start code on reset*/
+Reset:
+ bl set_cpu_mode /*设置特权模式*/
+ bl turn_off_watchdog /*关闭看门狗*/
+ bl mask_irqs /*关闭中断*/
+ bl set_clock /*设置时钟*/
+ bl disable_caches /*关闭caches*/
+ bl init_sram /*初始化sram*/
+ bl init_stack /*初始化栈*/
+ @bl turn_on_led /*利用led_debug*/
+ @bl clean_bss /*初始化bss*/
+ @bl copy_to_ram /*复制自身到ram*/
+ bl create_page_table /*创建page_table*/
+ @bl mmu_init /*初始化mmu*/
+ @bl nand_init /*初始化nand*/
+ bl arm_main /*执行main函数*/
+
+Undef:
+ nop
+
+SWI:
+ nop
+
+P_abort:
+ nop
+
+D_abort:
+ nop
+
+Reserved:
+ nop
+
+irq:
+ @mov sp, #0x32000000
+ sub lr, lr, #4
+ stmfd sp!, {r0-r12, lr}
+ @ldr lr, =int_return
+ @ldr pc, =handle_int
+ bl handle_int
+ int_return:
+ ldmfd sp!, {r0-r12, pc}^ 
+
+fiq:
+ nop
+
+/*******************reset********************/
+set_cpu_mode:
+ mrs r0, cpsr /*获取cpsr*/
+ bic r0, r0, #0x1f /*清空后五位*/
+ orr r0, r0, #0xd3 /*设置后五位*/
+ msr cpsr, r0
+ mov pc, lr
+
+turn_off_watchdog:
+ ldr r0, =WTCON
+ mov r1, #0x0
+ str r1, [r0]
+ mov pc, lr
+
+turn_on_led:
+ LDR R0,=0x56000010 @ R0设为GPBCON寄存器。此寄存器
+ MOV R1,#0x00000400 
+ STR R1,[R0] @ 设置GPB5为输出口, 位[10:9]=0b01
+ LDR R0,=0x56000014 @ R0设为GPBDAT寄存器。此寄存器
+ MOV R1,#0x00000000 @ 此值改为0x00000020,
+ STR R1,[R0] @ GPB5输出0，LED1点亮
+ @b turn_on_led
+ mov pc, lr
+
+mask_irqs:
+ mov r0, #0
+ ldr r1, =0x4a000008
+ str r0, [r1]
+ mov pc, lr
+
+set_clock:
+ /*FCLK:HCLK:PCLK = 1:4:8*/
+ ldr r0, =CLKDIVN
+ mov r1, #0x5
+ str r1, [r0]
+ mrc p15, 0, r0,c1,c0,0
+ orr r0,r0,#0xc0000000
+ mcr p15,0,r0,c1,c0,0
+ /*FCLK = 405MHZ*/
+ ldr r0, =MPLLCON
+ ldr r1, =MPLL_405M
+ str r1, [r0]
+ mov pc, lr
+
+disable_caches:
+ /*******flush I/Dcaches and mmu*****/
+ mcr p15, 0, r0, c7, c7, 0
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #0x00000007 
+ mcr p15, 0, r0, c1, c0, 0
+ mov pc, lr
+
+init_sram:
+ @设置存储控制器以便使用SDRAM等外设
+ mov r1, #MEM_CTL_BASE
+ adrl r2, mem_cfg_val
+ add r3, r1, #52
+1:
+ ldr r4, [r2], #4
+ str r4, [r1], #4
+ cmp r1, r3
+ bne 1b
+ mov pc, lr
+
+nand_init: /*初始化nand*/
+
+init_stack: /*初始化栈*/
+ msr cpsr_c, #0xd2
+ ldr sp, =0x33000000 /**R13_irq**/
+ msr cpsr_c, #0xd3
+ ldr sp, =0x34000000 /**R13_svc**/
+ mov pc, lr
+
+clean_bss: /*初始化bss*/
+
+copy_to_ram: /*复制自身到ram*/
+
+.align 4
+mem_cfg_val:
+ @存储控制器13个寄存器的设置值
+ .long 0x22011110 @ BWSCON
+ .long 0x00000700 @ BANKCON0
+ .long 0x00000700 @ BANKCON1
+ .long 0x00000700 @ BANKCON2
+ .long 0x00000700 @ BANKCON3
+ .long 0x00000700 @ BANKCON4
+ .long 0x00000700 @ BANKCON5
+ .long 0x00018005 @ BANKCON6
+ .long 0x00018005 @ BANKCON7
+ .long 0x008c07A3 @ REFRESH
+ .long 0x000000B1 @ BANKSIZE
+ .long 0x00000030 @ MRSRB6
+ .long 0x00000030 @ MRSRB7
+

include/common.h

@@ -0,0 +1,15 @@
+#ifndef __COMMON_H
+#define __COMMON_H
+
+//int (*p)(const char *, ...) = (void *)0xc7e11d70;
+//p("hello p %d\n", 100);
+//int printf(const char *format, ...);
+//int scanf (const char *format, ...);
+
+#define printf(...) (((int (*)(const char *, ...))0x33f963a4)(__VA_ARGS__))
+#define scanf(...) (((int (*)(const char *, ...))0x33f963a4)(__VA_ARGS__))
+
+#define I2CIntHandle() (((void (*)())0x30008374)())
+#define NULL (void *)
+
+#endif

include/i2c.h

@@ -0,0 +1,41 @@
+/*
+ * =====================================================================================
+ *
+ * Filename: iic.h
+ *
+ * Description: 
+ *
+ * Version: 1.0
+ * Created: 2016/9/13 15:04:13
+ * Revision: none
+ * Compiler: gcc
+ *
+ * Author: YOUR NAME (), 
+ * Organization: 
+ *
+ * =====================================================================================
+ */
+
+#define GPECON (* (volatile unsigned long *)0x56000040) 
+#define GPEDAT (* (volatile unsigned long *)0x56000044)
+#define GPEUP (* (volatile unsigned long *)0x56000048)
+
+#define IICCON (* (volatile unsigned long *)0x54000000) 
+#define IICSTAT (* (volatile unsigned long *)0x54000004)
+#define IICADD (* (volatile unsigned long *)0x54000008)
+#define IICDS (* (volatile unsigned long *)0x5400000C)
+
+#define WRDATA (1)
+#define RDDATA (2)
+#define BIT_IIC (0x1<<27)
+void i2c_write(unsigned int slvAddr, unsigned char *buf, int len);
+void i2c_read(unsigned int slvAddr, unsigned char *buf, int len);
+
+typedef struct tI2C {
+ unsigned char *pData; /* 数据缓冲区 */
+ volatile int DataCount; /* 等待传输的数据长度 */
+ volatile int Status; /* 状态 */
+ volatile int Mode; /* 模式：读/写 */
+ volatile int Pt; /* pData中待传输数据的位置 */
+}tS3C24xx_I2C, *ptS3C24xx_I2C;
+

include/irq.h

@@ -0,0 +1,35 @@
+/*
+ * =====================================================================================
+ *
+ * Filename: irq.h
+ *
+ * Description: 
+ *
+ * Version: 1.0
+ * Created: 2016/9/12 14:57:27
+ * Revision: none
+ * Compiler: gcc
+ *
+ * Author: YOUR NAME (), 
+ * Organization: 
+ *
+ * =====================================================================================
+ */
+#define SRCPND (*(volatile unsigned long *)0X4A000000)
+#define INTMOD (*(volatile unsigned long *)0X4A000004)
+#define INTMSK (*(volatile unsigned long *)0X4A000008) 
+#define PRIORITY (*(volatile unsigned long *)0x4A00000C)
+#define INTPND (*(volatile unsigned long *)0X4A000010)
+#define INTOFFSET (*(volatile unsigned long *)0X4A000014)
+
+#define INTSUBMSK (*(volatile unsigned long *)0X4A00001C)
+#define SUBSRCPND (*(volatile unsigned long *)0X4A000018)
+
+#define WTCON (*(volatile unsigned long *)0x53000000) 
+#define WTDAT (*(volatile unsigned long *)0x53000004)
+#define WTCNT (*(volatile unsigned long *)0x53000008)
+
+void irq_init();
+void wdt_init();
+void cpsr_irq_enable();
+

include/s3c24xx.h

@@ -0,0 +1,73 @@
+/* WOTCH DOG register */
+#define WTCON (*(volatile unsigned long *)0x53000000)
+
+/* SDRAM regisers */
+#define MEM_CTL_BASE 0x48000000
+#define SDRAM_BASE 0x30000000
+
+/* NAND Flash registers */
+#define NFCONF (*(volatile unsigned int *)0x4e000000)
+#define NFCMD (*(volatile unsigned char *)0x4e000004)
+#define NFADDR (*(volatile unsigned char *)0x4e000008)
+#define NFDATA (*(volatile unsigned char *)0x4e00000c)
+#define NFSTAT (*(volatile unsigned char *)0x4e000010)
+
+/*GPIO registers*/
+#define GPBCON (*(volatile unsigned long *)0x56000010)
+#define GPBDAT (*(volatile unsigned long *)0x56000014)
+
+#define GPFCON (*(volatile unsigned long *)0x56000050)
+#define GPFDAT (*(volatile unsigned long *)0x56000054)
+#define GPFUP (*(volatile unsigned long *)0x56000058)
+
+#define GPGCON (*(volatile unsigned long *)0x56000060)
+#define GPGDAT (*(volatile unsigned long *)0x56000064)
+#define GPGUP (*(volatile unsigned long *)0x56000068)
+
+#define GPHCON (*(volatile unsigned long *)0x56000070)
+#define GPHDAT (*(volatile unsigned long *)0x56000074)
+#define GPHUP (*(volatile unsigned long *)0x56000078)
+
+/*UART registers*/
+#define ULCON0 (*(volatile unsigned long *)0x50000000)
+#define UCON0 (*(volatile unsigned long *)0x50000004)
+#define UFCON0 (*(volatile unsigned long *)0x50000008)
+#define UMCON0 (*(volatile unsigned long *)0x5000000c)
+#define UTRSTAT0 (*(volatile unsigned long *)0x50000010)
+#define UTXH0 (*(volatile unsigned char *)0x50000020)
+#define URXH0 (*(volatile unsigned char *)0x50000024)
+#define UBRDIV0 (*(volatile unsigned long *)0x50000028)
+
+
+/*interrupt registes*/
+#define SRCPND (*(volatile unsigned long *)0x4A000000)
+#define INTMOD (*(volatile unsigned long *)0x4A000004)
+#define INTMSK (*(volatile unsigned long *)0x4A000008)
+#define PRIORITY (*(volatile unsigned long *)0x4A00000c)
+#define INTPND (*(volatile unsigned long *)0x4A000010)
+#define INTOFFSET (*(volatile unsigned long *)0x4A000014)
+#define SUBSRCPND (*(volatile unsigned long *)0x4A000018)
+#define INTSUBMSK (*(volatile unsigned long *)0x4A00001c)
+
+/*external interrupt registers*/
+#define EINTMASK (*(volatile unsigned long *)0x560000a4)
+#define EINTPEND (*(volatile unsigned long *)0x560000a8)
+
+/*clock registers*/
+#define LOCKTIME (*(volatile unsigned long *)0x4c000000)
+#define MPLLCON (*(volatile unsigned long *)0x4c000004)
+#define UPLLCON (*(volatile unsigned long *)0x4c000008)
+#define CLKCON (*(volatile unsigned long *)0x4c00000c)
+#define CLKSLOW (*(volatile unsigned long *)0x4c000010)
+#define CLKDIVN (*(volatile unsigned long *)0x4c000014)
+
+
+/*PWM & Timer registers*/
+#define TCFG0 (*(volatile unsigned long *)0x51000000)
+#define TCFG1 (*(volatile unsigned long *)0x51000004)
+#define TCON (*(volatile unsigned long *)0x51000008)
+#define TCNTB0 (*(volatile unsigned long *)0x5100000c)
+#define TCMPB0 (*(volatile unsigned long *)0x51000010)
+#define TCNTO0 (*(volatile unsigned long *)0x51000014)
+
+#define GSTATUS1 (*(volatile unsigned long *)0x560000B0)

include/start.inc

@@ -0,0 +1,5 @@
+#define WTCON 0x53000000
+#define CLKDIVN 0x4c000014
+#define MPLLCON 0x4C000004
+#define MPLL_405M ((0x7f<<12)|(2<<4)|(1<<0))
+

include/uart.h

@@ -0,0 +1,24 @@
+/*
+ * =====================================================================================
+ *
+ * Filename: uart.h
+ *
+ * Description: 
+ *
+ * Version: 1.0
+ * Created: 2017/3/1 11:44:57
+ * Revision: none
+ * Compiler: gcc
+ *
+ * Author: YOUR NAME (), 
+ * Organization: 
+ *
+ * =====================================================================================
+ */
+
+#ifndef __INCLUDE_UART_H
+#define __INCLUDE_UART_H
+
+extern int uprintf(const char *fmt, ...);
+
+#endif

kernel/main.c

@@ -0,0 +1,36 @@
+/*
+ * =====================================================================================
+ *
+ * Filename: main.c
+ *
+ * Description: 
+ *
+ * Version: 1.0
+ * Created: 2016/9/12 17:19:13
+ * Revision: none
+ * Compiler: gcc
+ *
+ * Author: YOUR NAME (), 
+ * Organization: 
+ *
+ * =====================================================================================
+ */
+#include "common.h"
+void handle_int()
+{
+ printf("hello irq\r\n");
+ I2CIntHandle();
+}
+
+void arm_main()
+{
+ int i;
+ char *str = "abcd";
+ uart0_init();
+ uprintf("%s\r\n", str);
+ for (i = 0; i <= 4; i++) {
+ putc(*(str+i));
+ }
+ while(1);
+}
+ //uprintf("%s\r\n", str);