internal/cpu: fix wrong cache line size of riscv64

All of riscv CPU using 64B for cache-line size.
i.e. U540 of Hifive Unleashed (https://www.sifive.com/boards/hifive-unleashed)

Change-Id: I0d72d88ac026f45383c3b3eb3a77233d3c2e4004
Reviewed-on: https://go-review.googlesource.com/c/go/+/526659
Run-TryBot: M Zhuo <[email protected]>
Reviewed-by: Cherry Mui <[email protected]>
Reviewed-by: Heschi Kreinick <[email protected]>
TryBot-Result: Gopher Robot <[email protected]>

src/internal/cpu/cpu_riscv64.go

@@ -4,7 +4,7 @@
 
 package cpu
 
-const CacheLinePadSize = 32
+const CacheLinePadSize = 64
 
 func doinit() {
 }