GitHub - bonben/tetris: VHDL description of a tetris game for Digilent Nexys3 Board

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Name		Name	Last commit message	Last commit date
Latest commit History 44 Commits
.Xil/PlanAhead-4343-portablebio/ngc2edif		.Xil/PlanAhead-4343-portablebio/ngc2edif
Docs		Docs
ipcore_dir		ipcore_dir
tetris.data		tetris.data
tetris.srcs/sources_1		tetris.srcs/sources_1
.gitignore		.gitignore
8couleurs.ram		8couleurs.ram
Decomposer.vhd		Decomposer.vhd
Display_driver.vhd		Display_driver.vhd
Doxyfile		Doxyfile
IP_clk.vhd		IP_clk.vhd
Multiplier.vhd		Multiplier.vhd
Nexys3_Master.ucf		Nexys3_Master.ucf
README.md		README.md
TODO		TODO
allumage_digit.vhd		allumage_digit.vhd
cadenceur.vhd		cadenceur.vhd
cadenceur200Hz.vhd		cadenceur200Hz.vhd
coeur.vhd		coeur.vhd
compteur_mux_digit.vhd		compteur_mux_digit.vhd
control_unit.vhd		control_unit.vhd
control_unit_test.vhd		control_unit_test.vhd
counter_256.vhd		counter_256.vhd
counter_64.vhd		counter_64.vhd
cpt.vhd		cpt.vhd
cpt_test.vhd		cpt_test.vhd
cpu.vhd		cpu.vhd
cpu_test.vhd		cpu_test.vhd
debounce.vhd		debounce.vhd
ff.vhd		ff.vhd
ffnewpiece.vhd		ffnewpiece.vhd
formes.ram		formes.ram
fsm.vhd		fsm.vhd
fsm_cpu.vhd		fsm_cpu.vhd
fsm_score.vhd		fsm_score.vhd
fsm_test.vhd		fsm_test.vhd
fuse.xmsgs		fuse.xmsgs
fuseRelaunch.cmd		fuseRelaunch.cmd
gestion_affichage.vhd		gestion_affichage.vhd
gestion_chute.vhd		gestion_chute.vhd
gestion_decal.vhd		gestion_decal.vhd
gestion_decal.vhd.orig		gestion_decal.vhd.orig
gestion_refresh.vhd		gestion_refresh.vhd
gestion_refresh.vhd.orig		gestion_refresh.vhd.orig
gestion_rot.vhd		gestion_rot.vhd
gestion_score.vhd		gestion_score.vhd
import_ise_summary.txt		import_ise_summary.txt
init.RAM		init.RAM
maconf.wcfg		maconf.wcfg
memory.vhd		memory.vhd
memory_cpu.vhd		memory_cpu.vhd
memory_test.vhd		memory_test.vhd
mouvement.vhd		mouvement.vhd
mux.vhd		mux.vhd
mux_2_1b.vhd		mux_2_1b.vhd
mux_2_6b.vhd		mux_2_6b.vhd
mux_2_8b.vhd		mux_2_8b.vhd
mux_4_13b.vhd		mux_4_13b.vhd
mux_4_1b.vhd		mux_4_1b.vhd
mux_4_8b.vhd		mux_4_8b.vhd
mux_8_1b.vhd		mux_8_1b.vhd
mux_8_8b.vhd		mux_8_8b.vhd
mux_digit.vhd		mux_digit.vhd
mux_test.vhd		mux_test.vhd
operative_unit.vhd		operative_unit.vhd
operative_unit_test.vhd		operative_unit_test.vhd
pa.fromNetlist.tcl		pa.fromNetlist.tcl
reg_13b.vhd		reg_13b.vhd
reg_8b.vhd		reg_8b.vhd
reg_8b_test.vhd		reg_8b_test.vhd
table_transcodage_0to9999.vhd		table_transcodage_0to9999.vhd
test.ram		test.ram
test_Display_driver.vhd		test_Display_driver.vhd
test_cpu.vhd		test_cpu.vhd
test_fsm.vhd		test_fsm.vhd
test_gestion_chute.vhd		test_gestion_chute.vhd
test_gestion_score.vhd		test_gestion_score.vhd
test_mouvement.vhd		test_mouvement.vhd
test_tetris.vhd		test_tetris.vhd
test_tetris_isim_beh1.wdb		test_tetris_isim_beh1.wdb
test_vga_controller.vhd		test_vga_controller.vhd
tetris.ram		tetris.ram
tetris.vhd		tetris.vhd
tetris.xise		tetris.xise
tetris.xise.orig		tetris.xise.orig
tetris.xpr		tetris.xpr
transcodeur_bcd_7seg.vhd		transcodeur_bcd_7seg.vhd
ual.vhd		ual.vhd
ual_test.vhd		ual_test.vhd
vga_controller.vhd		vga_controller.vhd
xflow.his		xflow.his

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#Tetris Academic project on the Nexys3 board using VGA. The project is described in VHDL language. Hope you'll enjoy it ;)

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