Welcome to LASER310_FPGA project. This project is an attempt to recreate the once famous VZ300/Laser310 computer in 80's on Altera Cyclone based FPGA boards.
Software requirment:
Quartus 13.0 web edition for projects except DE0_CV. For DE0_CV, you need 18.0 or newer.
Features implemented:
- MC6847 /w VGA output
- Super high resolution mode (256*192)
- Cassette input/output emu
- Laser310 internal ROM/DOS ROM on flash
- Enable external ROM with onboard switches at runtime.
- VZ200 support
- 256K RAM module
- Buzzer output
- PS/2 keyboard support (Ctrl+F12 to reset).
- 12.5MHz overclock on SW0
Planned
- Z80 bus on GPIO mapping.
- Floppy emu support
Screenshots
IORQ output n,5 captured on GPIO1
Supported boards
- Terasic DE0
- Terasic DE0_CV
- Terasic DE1
- Terasic DE2
- Terasic DE2-70
- Terasic DE2-115
Folder structures
doc_LASER310:
Laser310 Ext Basic P1.5c and user manual.
Laser310 System B and user manual.
Laser310 Monitor and user manual
Cassette output encoding details.
Laser310 keyboard encoding schema
Laser310 oscilloscope screenshot of cassette output
rom:
VZ300/Laser310 roms
Software:
development tools for this project.
vz:
Some come games for testing.
SYSTEM-B.vz is a binary file loading/saving tool for cassette/disk on Laser 310.
BASIC_P1.5C.vz is an extended Basic for Laser 310 developed by XinMin Peng in 80's.
MONITORR.vz is a Laser 310 system monitor.
More details on these VZ300/Laser310 softwares to follow.