arch: arm64: ARMv8-A support for NuttX

arch/Kconfig

@@ -22,6 +22,20 @@ config ARCH_ARM
  ---help---
  The ARM architectures
 
+config ARCH_ARM64
+ bool "ARM64"
+ select ARCH_HAVE_BACKTRACE
+ select ARCH_HAVE_INTERRUPTSTACK
+ select ARCH_HAVE_VFORK
+ select ARCH_HAVE_STACKCHECK
+ select ARCH_HAVE_CUSTOMOPT
+ select ARCH_HAVE_STDARG_H
+ select ARCH_HAVE_SYSCALL_HOOKS
+ select ARCH_HAVE_RDWR_MEM_CPU_RUN
+ select ARCH_HAVE_THREAD_LOCAL
+ ---help---
+ The ARM64 architectures
+
 config ARCH_AVR
  bool "AVR"
  select ARCH_NOINTC
@@ -147,6 +161,7 @@ endchoice
 config ARCH
  string
  default "arm" if ARCH_ARM
+ default "arm64" if ARCH_ARM64
  default "avr" if ARCH_AVR
  default "hc" if ARCH_HC
  default "mips" if ARCH_MIPS
@@ -162,6 +177,7 @@ config ARCH
  default "sparc" if ARCH_SPARC
 
 source "arch/arm/Kconfig"
+source "arch/arm64/Kconfig"
 source "arch/avr/Kconfig"
 source "arch/hc/Kconfig"
 source "arch/mips/Kconfig"

arch/arm64/Kconfig

@@ -0,0 +1,78 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_ARM64
+comment "ARM64 Options"
+
+choice
+ prompt "ARM64 chip selection"
+ default ARCH_CHIP_QEMU
+
+config ARCH_CHIP_QEMU
+ bool "QEMU virt platform (cortex-a53)"
+ select ARCH_CORTEX_A53
+ select ARCH_HAVE_ADDRENV
+ select ARCH_NEED_ADDRENV_MAPPING
+ ---help---
+ QEMU virt platform (cortex-a53)
+
+endchoice
+
+config ARCH_ARMV8A
+ bool
+ default n
+
+config ARCH_ARMV8R
+ bool
+ default n
+
+config ARCH_CORTEX_A53
+ bool
+ default n
+ select ARCH_ARMV8A
+ select ARM_HAVE_NEON
+ select ARCH_HAVE_TRUSTZONE
+ select ARCH_DCACHE
+ select ARCH_ICACHE
+ select ARCH_HAVE_MMU
+ select ARCH_HAVE_FPU
+ select ARCH_HAVE_TESTSET
+
+config ARCH_CORTEX_R82
+ bool
+ default n
+ select ARCH_ARMV8R
+ select ARCH_DCACHE
+ select ARCH_ICACHE
+ select ARCH_HAVE_MPU
+ select ARCH_HAVE_TESTSET
+
+config ARCH_FAMILY
+ string
+ default "armv8-a" if ARCH_ARMV8A
+ default "armv8-r" if ARCH_ARMV8R
+
+config ARCH_CHIP
+ string
+ default "qemu" if ARCH_CHIP_QEMU
+
+config ARCH_HAVE_TRUSTZONE
+ bool
+ default n
+ ---help---
+ Automatically selected to indicate that the ARM CPU supports
+ TrustZone.
+
+config ARM_HAVE_NEON
+ bool
+ default n
+ ---help---
+ Decide whether support NEON instruction
+
+if ARCH_CHIP_QEMU
+source "arch/arm64/src/qemu/Kconfig"
+endif
+
+endif # ARCH_ARM64

arch/arm64/include/.gitignore

@@ -0,0 +1,2 @@
+/board
+/chip

arch/arm64/include/arch.h

@@ -0,0 +1,139 @@
+/****************************************************************************
+ * arch/arm64/include/arch.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directly but, rather,
+ * only indirectly through nuttx/arch.h
+ */
+
+#ifndef __ARCH_ARM64_INCLUDE_ARCH_H
+#define __ARCH_ARM64_INCLUDE_ARCH_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+# include <nuttx/pgalloc.h>
+# include <nuttx/addrenv.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Prototypes
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_ADDRENV
+#if CONFIG_MM_PGSIZE != 4096
+# error Only pages sizes of 4096 are currently supported (CONFIG_ARCH_ADDRENV)
+#endif
+
+#endif /* CONFIG_ARCH_ADDRENV */
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_ADDRENV
+/* The task group resources are retained in a single structure, task_group_s
+ * that is defined in the header file nuttx/include/nuttx/sched.h. The type
+ * group_addrenv_t must be defined by platform specific logic in
+ * nuttx/arch/<architecture>/include/arch.h.
+ *
+ * These tables would hold the physical address of the level 2 page tables.
+ * All would be initially NULL and would not be backed up with physical
+ * memory until mappings in the level 2 page table are required.
+ */
+
+struct group_addrenv_s
+{
+ /* Level 1 page table entries for each group section */
+
+ uintptr_t *text[ARCH_TEXT_NSECTS];
+ uintptr_t *data[ARCH_DATA_NSECTS];
+#ifdef CONFIG_BUILD_KERNEL
+ uintptr_t *heap[ARCH_HEAP_NSECTS];
+#ifdef CONFIG_MM_SHM
+ uintptr_t *shm[ARCH_SHM_NSECTS];
+#endif
+
+ /* Initial heap allocation (in bytes). This exists only provide an
+ * indirect path for passing the size of the initial heap to the heap
+ * initialization logic. These operations are separated in time and
+ * architecture. REVISIT: I would like a better way to do this.
+ */
+
+ size_t heapsize;
+#endif
+};
+
+typedef struct group_addrenv_s group_addrenv_t;
+
+/* This type is used when the OS needs to temporarily instantiate a
+ * different address environment. Used in the implementation of
+ *
+ * int up_addrenv_select(group_addrenv_t addrenv, save_addrenv_t *oldenv);
+ * int up_addrenv_restore(save_addrenv_t oldenv);
+ *
+ * In this case, the saved value in the L1 page table are returned
+ */
+
+struct save_addrenv_s
+{
+ uint32_t text[ARCH_TEXT_NSECTS];
+ uint32_t data[ARCH_DATA_NSECTS];
+#ifdef CONFIG_BUILD_KERNEL
+ uint32_t heap[ARCH_HEAP_NSECTS];
+#ifdef CONFIG_MM_SHM
+ uint32_t shm[ARCH_SHM_NSECTS];
+#endif
+#endif
+};
+
+typedef struct save_addrenv_s save_addrenv_t;
+#endif
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_ARM64_INCLUDE_ARCH_H */

arch/arm64/include/inttypes.h

@@ -0,0 +1,119 @@
+/****************************************************************************
+ * arch/arm64/include/inttypes.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM64_INCLUDE_INTTYPES_H
+#define __ARCH_ARM64_INCLUDE_INTTYPES_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define PRId8 "d"
+#define PRId16 "d"
+#define PRId32 "d"
+#define PRId64 "ld"
+
+#define PRIdPTR "ld"
+
+#define PRIi8 "i"
+#define PRIi16 "i"
+#define PRIi32 "i"
+#define PRIi64 "li"
+
+#define PRIiPTR "li"
+
+#define PRIo8 "o"
+#define PRIo16 "o"
+#define PRIo32 "o"
+#define PRIo64 "lo"
+
+#define PRIoPTR "lo"
+
+#define PRIu8 "u"
+#define PRIu16 "u"
+#define PRIu32 "u"
+#define PRIu64 "lu"
+
+#define PRIuPTR "lu"
+
+#define PRIx8 "x"
+#define PRIx16 "x"
+#define PRIx32 "x"
+#define PRIx64 "lx"
+
+#define PRIxPTR "lx"
+
+#define PRIX8 "X"
+#define PRIX16 "X"
+#define PRIX32 "X"
+#define PRIX64 "lX"
+
+#define PRIXPTR "lX"
+
+#define SCNd8 "hhd"
+#define SCNd16 "hd"
+#define SCNd32 "d"
+#define SCNd64 "ld"
+
+#define SCNdPTR "ld"
+
+#define SCNi8 "hhi"
+#define SCNi16 "hi"
+#define SCNi32 "i"
+#define SCNi64 "li"
+
+#define SCNiPTR "li"
+
+#define SCNo8 "hho"
+#define SCNo16 "ho"
+#define SCNo32 "o"
+#define SCNo64 "lo"
+
+#define SCNoPTR "lo"
+
+#define SCNu8 "hhu"
+#define SCNu16 "hu"
+#define SCNu32 "u"
+#define SCNu64 "lu"
+
+#define SCNuPTR "lu"
+
+#define SCNx8 "hhx"
+#define SCNx16 "hx"
+#define SCNx32 "x"
+#define SCNx64 "lx"
+
+#define SCNxPTR "lx"
+
+#define INT8_C(x) x
+#define INT16_C(x) x
+#define INT32_C(x) x
+#define INT64_C(x) x ## l
+
+#define UINT8_C(x) x
+#define UINT16_C(x) x
+#define UINT32_C(x) x ## u
+#define UINT64_C(x) x ## ul
+
+#endif /* __ARCH_ARM64_INCLUDE_INTTYPES_H */