filters: adrv9002: add new API profiles

The adrv9002 driver was updated to the 68.8.1 API. This patch updates the profiles/streams accordingly. Signed-off-by: Nuno Sa <[email protected]>
analogdevicesinc · Oct 12, 2023 · db87b69 · db87b69
1 parent d934ac7
commit db87b69
Show file tree

Hide file tree

Showing 8 changed files with 67 additions and 35 deletions.
diff --git a/.../adrv9002/lte_10_lvds_nco_api_68_5_0.json → .../adrv9002/lte_10_lvds_nco_api_68_8_1.json b/.../adrv9002/lte_10_lvds_nco_api_68_5_0.json → .../adrv9002/lte_10_lvds_nco_api_68_8_1.json
@@ -131,7 +131,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -248,7 +249,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -365,7 +367,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -482,7 +485,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -599,7 +603,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -716,7 +721,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -833,7 +839,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -950,7 +957,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,

diff --git a/...drv9002/lte_10_lvds_nco_api_68_5_0.stream → ...drv9002/lte_10_lvds_nco_api_68_8_1.stream b/...drv9002/lte_10_lvds_nco_api_68_5_0.stream → ...drv9002/lte_10_lvds_nco_api_68_8_1.stream
diff --git a/filters/adrv9002/lte_20_lvds_api_68_5_0.json → filters/adrv9002/lte_20_lvds_api_68_8_1.json b/filters/adrv9002/lte_20_lvds_api_68_5_0.json → filters/adrv9002/lte_20_lvds_api_68_8_1.json
@@ -1,6 +1,6 @@
 {
  "clocks": {
- "deviceClock_kHz": 40000,
+ "deviceClock_kHz": 38400,
  "clkPllVcoFreq_daHz": 884736000,
  "clkPllHsDiv": 0,
  "clkPllMode": 0,
@@ -131,7 +131,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -248,7 +249,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -365,7 +367,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -482,7 +485,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -599,7 +603,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -716,7 +721,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -833,7 +839,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -950,7 +957,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,

diff --git a/...rs/adrv9002/lte_20_lvds_api_68_5_0.stream → ...rs/adrv9002/lte_20_lvds_api_68_8_1.stream b/...rs/adrv9002/lte_20_lvds_api_68_5_0.stream → ...rs/adrv9002/lte_20_lvds_api_68_8_1.stream
diff --git a/filters/adrv9002/lte_40_lvds_api_68_5_0.json → filters/adrv9002/lte_40_lvds_api_68_8_1.json b/filters/adrv9002/lte_40_lvds_api_68_5_0.json → filters/adrv9002/lte_40_lvds_api_68_8_1.json
@@ -1,6 +1,6 @@
 {
  "clocks": {
- "deviceClock_kHz": 40000,
+ "deviceClock_kHz": 38400,
  "clkPllVcoFreq_daHz": 884736000,
  "clkPllHsDiv": 0,
  "clkPllMode": 0,
@@ -131,7 +131,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -248,7 +249,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -365,7 +367,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -482,7 +485,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -599,7 +603,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -716,7 +721,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 2,
@@ -833,7 +839,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -950,7 +957,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,

diff --git a/...rs/adrv9002/lte_40_lvds_api_68_5_0.stream → ...rs/adrv9002/lte_40_lvds_api_68_8_1.stream b/...rs/adrv9002/lte_40_lvds_api_68_5_0.stream → ...rs/adrv9002/lte_40_lvds_api_68_8_1.stream
diff --git a/filters/adrv9002/lte_5_cmos_api_68_5_0.json → filters/adrv9002/lte_5_cmos_api_68_8_1.json b/filters/adrv9002/lte_5_cmos_api_68_5_0.json → filters/adrv9002/lte_5_cmos_api_68_8_1.json
@@ -1,6 +1,6 @@
 {
  "clocks": {
- "deviceClock_kHz": 40000,
+ "deviceClock_kHz": 38400,
  "clkPllVcoFreq_daHz": 884736000,
  "clkPllHsDiv": 0,
  "clkPllMode": 0,
@@ -131,7 +131,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 1,
@@ -248,7 +249,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 1,
@@ -365,7 +367,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -482,7 +485,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -599,7 +603,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 1,
@@ -716,7 +721,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 1,
@@ -833,7 +839,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,
@@ -950,7 +957,8 @@
  "numberLnaGainSteps": 0,
  "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],
  "lnaDigitalGainDelay": 0,
- "minGainIndex": 0
+ "minGainIndex": 0,
+ "lnaType": 0
  },
  "rxSsiConfig": {
  "ssiType": 0,

diff --git a/...ers/adrv9002/lte_5_cmos_api_68_5_0.stream → ...ers/adrv9002/lte_5_cmos_api_68_8_1.stream b/...ers/adrv9002/lte_5_cmos_api_68_5_0.stream → ...ers/adrv9002/lte_5_cmos_api_68_8_1.stream