Description: A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 x 480 resolution, 30 fps.

1. Nexys A7-100T FPGA Developmental Board (1)
2. Female-Female Jumper Pins (16)
3. Female-Male Jumper Pins (4)
4. 4.7k Ohm Pull-Resistors (2)
5. Male-Male VGA Video Connector (1)
6. OV7670 CMOS VGA (640x480) Camera (1)
7. Monitor that supports VGA (1)
8. Breadboard (1)

1. Vivado 2019.2