Skip to content

A well-posed RRAM SPICE model implemented in Verilog-A, based on Stanford/ASU filamentary model, using code developed at UC Berkeley

Notifications You must be signed in to change notification settings

akashlevy/WP-RRAM-SPICE-Model

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

2 Commits
 
 
 
 
 
 

Repository files navigation

WP-RRAM-SPICE-Model

This code is taken from https://arxiv.org/abs/1605.04897

Wang, Tianshi, and Jaijeet Roychowdhury. "Well-posed models of memristive devices." arXiv preprint arXiv:1605.04897 (2016).

A well-posed RRAM SPICE model implemented in Verilog-A, based on Stanford/ASU filamentary model, using code developed by UC Berkeley

About

A well-posed RRAM SPICE model implemented in Verilog-A, based on Stanford/ASU filamentary model, using code developed at UC Berkeley

Topics

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published