arm64: zynqmp: Add resets property for UART nodes

Add resets property for UART0 and UART1 nodes Signed-off-by: Manikanta Guntupalli <[email protected]> Link: https://lore.kernel.org/r/[email protected] State: upstream (b433768)
Xilinx · Jun 14, 2024 · 62dde3b · 62dde3b
1 parent 55227f5
commit 62dde3b
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -1040,6 +1040,7 @@
  reg = <0x0 0xff000000 0x0 0x1000>;
  clock-names = "uart_clk", "pclk";
  power-domains = <&zynqmp_firmware PD_UART_0>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_UART0>;
  };
 
  uart1: serial@ff010000 {
@@ -1051,6 +1052,7 @@
  reg = <0x0 0xff010000 0x0 0x1000>;
  clock-names = "uart_clk", "pclk";
  power-domains = <&zynqmp_firmware PD_UART_1>;
+ resets = <&zynqmp_reset ZYNQMP_RESET_UART1>;
  };
 
  usb0: usb@ff9d0000 {