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  • NUDT
  • Changsha

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@NetFPGA @fast-codesign @multitenancy-project
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  1. multitenancy-project/menshen multitenancy-project/menshen Public

    Verilog 39 4

  2. FastRMT FastRMT Public

    Orignal code/dev history for Menshen paper (NSDI 2022), see https://github.com/multitenancy-project/menshen for official version.

    Verilog 21 3

  3. fast-codesign/OpenTSN1.0 fast-codesign/OpenTSN1.0 Public

    an opensource project to enable TSN research with FAST

    C++ 34 25

  4. multitenancy-project/hc20-verilog multitenancy-project/hc20-verilog Public

    Verilog 3 2

  5. antDev antDev Public

    Agile Network Tester with FPGA & multi-cores

    VHDL 14 4

  6. QUIC-measurement-kit QUIC-measurement-kit Public

    scripts & tools for QUIC proformance profiling

    C 18 3