A tangent calculator written in Verilog; Datapath designed by Quartus II and controller was coded in verilog.

In this project both datapath and controller of ARM Single Cycle CPU is designed by using Verilog. I implemented this on Altera De0-Nano FPGA board.

This project includes 4 bit configuration of Datapath and controller of shift and add sequential multiplier design . It was designed in Xilinx VIVADO using Verilog HDL.

Digital electronics and verilog project

Image Processing Toolbox in Verilog using Basys3 FPGA

FIR Filter in Verilog

This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a breadboard, it has the functionalities of his computer and …

Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic

An 8 input interrupt controller written in Verilog.