- ๐ I am currently pursuing my masterโs degree in Electrical Engineering at Chung Cheng University
- ๐ฑ Iโm learning Digital IC Design / Verification
- Float Point Multiplier
- 5-Stage Pipeline MIPS CPU
- Convolution Circuit
- LCD Image Controller
- Job Assignment Machine
- Using standrad cell compare triangle areas
- Develop integrated verification environment with SystemVerilog
- Use random stimulus with functional coverage
- RTL coding, STA, Synthesis
- Gate level to Post- Layout simulation and Cell based APR flow