Moved construction of memory from architecture declaration to process

OSVVM · Dec 29, 2023 · 8aaf808 · 8aaf808
1 parent b5b106a
commit 8aaf808
Showing 1 changed file with 11 additions and 6 deletions.
diff --git a/src/DpRam_Singleton.vhd b/src/DpRam_Singleton.vhd
@@ -71,15 +71,20 @@ architecture Singleton of DpRam is
  constant RESOLVED_MEMORY_NAME : string :=
  IfElse(MEMORY_NAME /= "", MEMORY_NAME, to_lower(PathTail(DpRam'PATH_NAME))) ;
 
- constant Mem : MemoryIdType := NewID(
- Name => RESOLVED_MEMORY_NAME, 
- AddrWidth => ADDR_WIDTH, 
- DataWidth => DATA_WIDTH, 
- Search => NAME
- ) ;
+ signal Mem : MemoryIdType ;
 
  signal iDataOutA, iDataOutB : std_logic_vector(DATA_WIDTH-1 downto 0) ;
 begin
+ Initialize : process
+ begin
+ Mem <= NewID(
+ Name => RESOLVED_MEMORY_NAME, 
+ AddrWidth => ADDR_WIDTH, 
+ DataWidth => DATA_WIDTH, 
+ Search => NAME
+ ) ;
+ wait ; 
+ end process Initialize ; 
 
  MemProcA : process (ClkA) 
  begin