Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

Chisel examples and code snippets

A collaborative RISC-V CPU project

MIPS multi cycle Verilog implementation based on Computer Organization and Design by David A. Patterson and John L. Hennessy

A minimal GPU design in Verilog to learn how GPUs work from the ground up

International Symposium on Computer Architecture papers 收集历年计算机体系结构顶级会议ISCA的论文

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

Digital Design with Chisel

Chisel: A Modern Hardware Design Language

How to shortlist universities for MS in US?

IC implementation of Systolic Array for TPU

HDLBits website practices & solutions

Berkeley's Spatial Array Generator

Research programs for Undergraduate students

Verilog Realization of Little Computer 3, a processor used for book "Intro to Computing Systems"

An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。

This repository contains an example of Differential Pulse-Code Modulation (DPCM) written in MATLAB.

A repository of links with advice related to grad school applications, research, phd etc

SPI Slave for FPGA in Verilog and VHDL

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

ai_accelerator_basic_for_student (no solve)

FPGA based Vision Transformer accelerator (Harvard CS205)

Verilog library for ASIC and FPGA designers

Must-have verilog systemverilog modules

Verilog AXI stream components for FPGA implementation