Stars
SimIO is a collection of virtualized components to interact with a (System)Verilog simulation.
Documenting the Lattice ECP5 bit-stream format.
An Open-source FPGA IP Generator
OCR powered screen-capture tool to capture information instead of images
Some example circuits written in VHDL for Terasic DE0-Nano FPGA board.
Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040
Reference Designs for Arrow Development kits based on Agilex 5 FPGAs
The only public framework for developing applications with native refresh support for Remarkable Tablet
Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our special Video Controller in Basys3 Artix7-35T. Complemented…
Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples. https://www.chili-chips.xyz/open-cologne
Le script de la cité de la peur
A flexible and scalable development platform for modern FPGA projects.
SystemVerilog parser library fully compliant with IEEE 1800-2017
MuseScore is an open source and free music notation software. For support, contribution, bug reports, visit MuseScore.org. Fork and make pull requests!
The scripts that run on the Telraam Raspberry Pi computers, responsible for connecting to the local wifi, traffic monitoring and communicating with the central Telraam servers.
Submission template for Tiny Tapeout 06 - Chisel HDL Projects
Godot 3.6 / Gravity Bending Puzzle Platformer Game