Kanishk-K-U
Follow
Stars
This repo provide an index of VLSI content creators and their materials
Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
A collection of example projects using Embedded Swift
A modern hardware definition language and toolchain based on Python
Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.
HW and SW based implementation of Canny Edge Detection Algorithm.
MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy …
An CAN bus Controller implemented in Verilog
Verilog Ethernet components for FPGA implementation
A full-speed device-side USB peripheral core written in Verilog.
Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. Real hardware is available as a remote lab.
The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equ…
Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL
Verilog implementation of multi-stage 32-bit RISC-V processor
5-Stage Pipelined RV64IM RISC-V CPU design in Verilog.
Implementation of RSA algorithm on FPGA using Verilog
This is use FPGA of Xilinx ZYNQ-7000 ZC702
It contains a curated list of awesome RISC-V Resources.
A fully compliant RISC-V computer made inside the game Terraria
Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools
A comprehensive roadmap for aspiring Embedded Systems Engineers, featuring a curated list of learning resources.