Fix compilation on AArch64

JuliaLang · Dec 29, 2015 · 45d08d6 · 45d08d6
1 parent c072d1c
commit 45d08d6
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Showing 3 changed files with 26 additions and 2 deletions.
diff --git a/src/disasm.cpp b/src/disasm.cpp
@@ -583,7 +583,7 @@ void jl_dump_asm_internal(uintptr_t Fptr, size_t Fsize, size_t slide,
  switch (S) {
  case MCDisassembler::Fail:
  if (insSize == 0) // skip illegible bytes
-#if defined(_CPU_PPC_) || defined(_CPU_PPC64_) || defined(_CPU_ARM_)
+#if defined(_CPU_PPC_) || defined(_CPU_PPC64_) || defined(_CPU_ARM_) || defined(_CPU_AARCH64_)
  insSize = 4; // instructions are always 4 bytes
 #else
  insSize = 1; // attempt to slide 1 byte forward

diff --git a/src/ia_misc.h b/src/ia_misc.h
@@ -94,7 +94,29 @@ STATIC_INLINE void cpu_lfence(void)
  _mm_lfence();
 }
 
-#elif defined(__ARM_ARCH) && __ARM_ARCH >= 7
+#elif defined(_CPU_AARCH64_)
+
+STATIC_INLINE void cpu_pause(void)
+{
+ __asm__ volatile ("wfe" ::: "memory");
+}
+
+STATIC_INLINE void cpu_mfence(void)
+{
+ __asm__ volatile ("dmb ish" ::: "memory");
+}
+
+STATIC_INLINE void cpu_sfence(void)
+{
+ __asm__ volatile ("dmb ishst" ::: "memory");
+}
+
+STATIC_INLINE void cpu_lfence(void)
+{
+ __asm__ volatile ("dmb ishld" ::: "memory");
+}
+
+#elif defined(_CPU_ARM_) && __ARM_ARCH >= 7
 
 STATIC_INLINE void cpu_pause(void)
 {

diff --git a/src/support/platform.h b/src/support/platform.h
@@ -81,6 +81,8 @@
 #define _CPU_X86_64_
 #elif defined(i386) || defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(_X86_)
 #define _CPU_X86_
+#elif defined(__aarch64__)
+#define _CPU_AARCH64_
 #elif defined(__arm__) || defined(_M_ARM)
 #define _CPU_ARM_
 #elif defined(__PPC64__)