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  1. RTL-Implementation-of-Two-Layer-CNN RTL-Implementation-of-Two-Layer-CNN Public

    MyDesign.v contains the main design which was designed and then, synthesized.

    Verilog 7 4

  2. PipeCNN PipeCNN Public

    Forked from doonny/PipeCNN

    An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

    C++ 1

  3. FPGA_Based_CNN FPGA_Based_CNN Public

    Forked from mtmd/FPGA_Based_CNN

    FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.

    Verilog 1

  4. CNN-simulator CNN-simulator Public

    Forked from kennykpaul/CNN-simulator

    This is the RTL for a simplified version of CNN hardware

    Verilog 1

  5. convolution_network_on_FPGA convolution_network_on_FPGA Public

    Forked from hunterlew/convolution_network_on_FPGA

    CNN acceleration on virtex-7 FPGA with verilog HDL

    Verilog 1

  6. Hardware-CNN Hardware-CNN Public

    Forked from alan4186/Hardware-CNN

    A convolutional neural network implemented in hardware (verilog)

    Verilog 1