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Tsinghua University
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一个支持UI界面的清华云盘个人仓库批量下载, 链接批量下载,邮箱邮件批量下载工具,为毕业生批量迁移清华云盘内容和备份邮箱提供便利。
Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.
ncnn is a high-performance neural network inference framework optimized for the mobile platform
Code for ACM MobiCom 2024 paper "FlexNN: Efficient and Adaptive DNN Inference on Memory-Constrained Edge Devices"
HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
Code Repository of Evaluating Quantized Large Language Models
A list of awesome compiler projects and papers for tensor computation and deep learning.
清华大学计算机系课程攻略 Guidance for courses in Department of Computer Science and Technology, Tsinghua University
High-speed Large Language Model Serving on PCs with Consumer-grade GPUs
including compiler to encode DGL GNN model to instructions, runtime software to transfer data and control the accelerator, and hardware verilog code that can be implemented on FPGA
Machine-Learning Accelerator System Exploration Tools
High Bandwidth Memory (HBM) timing model based on DRAMSim2
Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA
AISystem 主要是指AI系统,包括AI芯片、AI编译器、AI推理和训练框架等AI全栈底层技术
Essential Cheat Sheets for deep learning and machine learning researchers https://medium.com/@kailashahirwar/essential-cheat-sheets-for-machine-learning-and-deep-learning-researchers-efb6a8ebd2e5
pku-liang / Sanger
Forked from hatsu3/SangerA co-design architecture on sparse attention
A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems
Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
An API standard for multi-agent reinforcement learning environments, with popular reference environments and related utilities
This is a series of quick start guide of Vitis HLS tool in Chinese. It explains the basic concepts and the most important optimize techniques you need to understand to use the Vitis HLS tool.
A novel architectural design for stitching video streams in real-time on an FPGA.