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pulpissimo
pulpissimo PublicForked from pulp-platform/pulpissimo
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
SystemVerilog
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riscv-gnu-toolchain
riscv-gnu-toolchain PublicForked from riscv-collab/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
C
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riscv
riscv PublicForked from openhwgroup/cv32e40p
RISCY is an in-order 4-stage RISC-V RV32IMFCXpulp CPU
SystemVerilog
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ibex
ibex PublicForked from lowRISC/ibex
Ibex is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, previously known as zero-riscy.
SystemVerilog
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riscv-isa-manual
riscv-isa-manual PublicForked from riscv/riscv-isa-manual
RISC-V Instruction Set Manual
TeX
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