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@DigitalLabIIESTS

Digital Electronics Lab

README.md

Digital Electronics Lab and VLSI & CAD Lab, Department of Electronics and Telecommunication Engineering, IIEST Shibpur

This Github organization is managed by the following team members from the Department of Electronics and Telecommunication Engineering, IIEST Shibpur.
Team Members

  1. Binit Kumar Pandit [PhD Scholar]
  2. Rebanta Dey [PG 2021-2023]
  3. Akash Ther [PG 2021-2023]
  4. Moitreya Chaudhury [PG 2022-2024]
  5. Amit Barman [UG 2021-2025]

The materials shared here will be based on the following topics(Not limited to):

  1. VLSI Architecture Design and Prototyping for Machine Learning Applications.
  2. Designing Hardware Accelerators.
  3. Deep Learning-based Medical Image Analysis.
  4. Circuits and Systems.
  5. Verilog based design
  6. Circuit implementation on FPGA (Spartan 6)

Popular repositories Loading

  1. VLSI-Front-End VLSI-Front-End Public

    Requirements for VLSI front-end Engineer

    4 1

  2. DigitalDesignUsingVerilogHDL DigitalDesignUsingVerilogHDL Public

    A Verilog HDL Guide for Beginners.

    Verilog 2 1

  3. Python-Tips-and-Tricks Python-Tips-and-Tricks Public

    Learning Journey of Python using Spyder and Jupyter Notebooks.

    Jupyter Notebook 1

  4. PG-UG-Project PG-UG-Project Public

    A repository to start with for UG and PG Project students.

  5. DNN_Resources DNN_Resources Public

  6. .github .github Public

Repositories

Showing 10 of 12 repositories
  • FPGA_DEMO_LAB Public

    FPGA Demo Lab 5th Sem UG

    DigitalLabIIESTS/FPGA_DEMO_LAB’s past year of commit activity
    0 0 0 0 Updated Oct 17, 2024
  • DigitalDesignUsingVerilogHDL Public

    A Verilog HDL Guide for Beginners.

    DigitalLabIIESTS/DigitalDesignUsingVerilogHDL’s past year of commit activity
    Verilog 2 1 0 0 Updated Sep 17, 2024
  • .github Public
    DigitalLabIIESTS/.github’s past year of commit activity
    0 0 0 0 Updated May 15, 2024
  • VLSI-Front-End Public

    Requirements for VLSI front-end Engineer

    DigitalLabIIESTS/VLSI-Front-End’s past year of commit activity
    4 1 0 0 Updated May 15, 2024
  • VLSI_Design Public
    DigitalLabIIESTS/VLSI_Design’s past year of commit activity
    0 0 0 0 Updated Oct 12, 2023
  • 4-bit_AOU Public Forked from AmitBarman99/4-bit_AOU

    This is a 4 bit AOU (Arithmetic Operator Unit) which was implemented by Spartan 6 FPGA. It can perform all the basic mathematical operations in a single time.

    DigitalLabIIESTS/4-bit_AOU’s past year of commit activity
    HTML 0 1 0 0 Updated Sep 1, 2023
  • Half_adder-in-FPGA Public Forked from AmitBarman99/Half_adder-in-FPGA

    A half adder implementation using spartan 6 FPGA

    DigitalLabIIESTS/Half_adder-in-FPGA’s past year of commit activity
    HTML 0 1 0 0 Updated Sep 1, 2023
  • PG-UG-Project Public

    A repository to start with for UG and PG Project students.

    DigitalLabIIESTS/PG-UG-Project’s past year of commit activity
    0 0 0 0 Updated Aug 11, 2023
  • Publications Public

    Recent Publications

    DigitalLabIIESTS/Publications’s past year of commit activity
    0 0 0 0 Updated Aug 5, 2023
  • DNN_Resources Public
    DigitalLabIIESTS/DNN_Resources’s past year of commit activity
    0 0 0 0 Updated Jul 28, 2023
View all repositories

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