hwspinlock: qcom: correct MMIO max register for newer SoCs

[ Upstream commit 90cb380f9ceb811059340d06ff5fd0c0e93ecbe1 ]

Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum
register 0x20000 (32 mutexes * 0x1000).

Fixes: 7a1e6fb ("hwspinlock: qcom: Allow mmio usage in addition to syscon")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Sasha Levin <[email protected]>

drivers/hwspinlock/qcom_hwspinlock.c

@@ -105,7 +105,7 @@ static const struct regmap_config tcsr_mutex_config = {
  .reg_bits = 32,
  .reg_stride = 4,
  .val_bits = 32,
- .max_register = 0x40000,
+ .max_register = 0x20000,
  .fast_io = true,
 };