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New patch update for AT32F415 #407

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merged 18 commits into from
Aug 11, 2024
Merged

New patch update for AT32F415 #407

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6bbcbcd
Patch update and cleanup CMSIS AT32F415 files
HorrorTroll May 5, 2024
ceb0454
Another patch update and cleanup AT32F415 files
HorrorTroll Jun 25, 2024
e234b69
Update board file, added new demo and HAL test
HorrorTroll Jul 3, 2024
fbdaa46
Update version of CMSIS files
HorrorTroll Jul 3, 2024
7c973fe
Update LLD driver for I2C, OTG and ERTC
HorrorTroll Jul 28, 2024
dc3f512
Update LLD driver for SYSTICK and GPT Timer
HorrorTroll Jul 30, 2024
fad2fcb
Update LLD driver for USART, ICU and PWM timers
HorrorTroll Aug 1, 2024
ae019b7
Update LLD drivers for ERTC and WDT again
HorrorTroll Aug 2, 2024
163d7ce
Update demo test
HorrorTroll Aug 3, 2024
f0adeb5
Added HAL driver test for ERTC, I2C bitbang and hardware
HorrorTroll Aug 3, 2024
0c71846
Added HAL driver test for ICU, PWM and UART
HorrorTroll Aug 4, 2024
6404f2f
Fixed missing CRC register on CMSIS
HorrorTroll Aug 5, 2024
41b3477
Deleted unused CRC on registry and update HAL test files
HorrorTroll Aug 5, 2024
92bcbce
Update LLD drivers for WDT again and small changes for HAL test
HorrorTroll Aug 5, 2024
b79c568
Added HAL driver test for WDT and update for USB_CDC
HorrorTroll Aug 5, 2024
a48b486
Update SPI LLD driver
HorrorTroll Aug 11, 2024
635a296
Added support for SDIO LLD driver
HorrorTroll Aug 11, 2024
d839f5d
Update mcuconf for all the test and demo files. Added new test for SD…
HorrorTroll Aug 11, 2024
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Fixed missing CRC register on CMSIS
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@HorrorTroll
HorrorTroll committed Aug 5, 2024
commit 6404f2f566228b9176cba44c90e60f22a4843ba6
24 changes: 24 additions & 0 deletions os/common/ext/CMSIS/ArteryTek/AT32F415/at32f415cx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -279,6 +279,7 @@ typedef struct
__IO uint32_t CTRL; /*!< CRC Control register, Address offset: 0x08 */
uint32_t RESERVED; /*!< Reserved, Address offset: 0x0C */
__IO uint32_t IDT; /*!< CRC Initialization register, Address offset: 0x10 */
__IO uint32_t POLY; /*!< CRC Polynomial register, Address offset: 0x14 */
} CRC_TypeDef;

/**
Expand Down Expand Up @@ -4205,6 +4206,24 @@ typedef struct
#define CRC_CTRL_RST_Msk (0x1U << CRC_CTRL_RST_Pos) /*!< 0x00000001 */
#define CRC_CTRL_RST CRC_CTRL_RST_Msk /*!< Reset CRC calculation unit */

/*!< POLY_SIZE configuration */
#define CRC_CTRL_POLY_SIZE_Pos (3U)
#define CRC_CTRL_POLY_SIZE_Msk (0x3U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000018 */
#define CRC_CTRL_POLY_SIZE CRC_CTRL_POLY_SIZE_Msk /*!< POLY_SIZE[1:0] bits (Polynomial size) */
#define CRC_CTRL_POLY_SIZE_0 (0x1U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000008 */
#define CRC_CTRL_POLY_SIZE_1 (0x2U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000010 */

#define CRC_CTRL_POLY_SIZE_32BITS 0x00000000U /*!< 32 bits */
#define CRC_CTRL_POLY_SIZE_16BITS_Pos (3U)
#define CRC_CTRL_POLY_SIZE_16BITS_Msk (0x1U << CRC_CTRL_POLY_SIZE_16BITS_Pos) /*!< 0x00000008 */
#define CRC_CTRL_POLY_SIZE_16BITS CRC_CTRL_POLY_SIZE_16BITS_Msk /*!< 16 bits */
#define CRC_CTRL_POLY_SIZE_8BITS_Pos (4U)
#define CRC_CTRL_POLY_SIZE_8BITS_Msk (0x1U << CRC_CTRL_POLY_SIZE_8BITS_Pos) /*!< 0x00000010 */
#define CRC_CTRL_POLY_SIZE_8BITS CRC_CTRL_POLY_SIZE_8BITS_Msk /*!< 8 bits */
#define CRC_CTRL_POLY_SIZE_7BITS_Pos (3U)
#define CRC_CTRL_POLY_SIZE_7BITS_Msk (0x3U << CRC_CTRL_POLY_SIZE_7BITS_Pos) /*!< 0x00000018 */
#define CRC_CTRL_POLY_SIZE_7BITS CRC_CTRL_POLY_SIZE_7BITS_Msk /*!< 7 bits */

/*!< REVID configuration */
#define CRC_CTRL_REVID_Pos (5U)
#define CRC_CTRL_REVID_Msk (0x3U << CRC_CTRL_REVID_Pos) /*!< 0x00000060 */
Expand Down Expand Up @@ -4232,6 +4251,11 @@ typedef struct
#define CRC_IDT_IDT_Msk (0xFFFFFFFFU << CRC_IDT_IDT_Pos) /*!< 0xFFFFFFFF */
#define CRC_IDT_IDT CRC_IDT_IDT_Msk /*!< Initialization data register */

/******************* Bit definition for CRC_POLY register *******************/
#define CRC_POLY_POLY_Pos (0U)
#define CRC_POLY_POLY_Msk (0xFFFFFFFFU << CRC_POLY_POLY_Pos) /*!< 0xFFFFFFFF */
#define CRC_POLY_POLY CRC_POLY_POLY_Msk /*!< Polynomial coefficient */

/******************************************************************************/
/* */
/* Inter-integrated circuit interface (I2C) */
Expand Down
24 changes: 24 additions & 0 deletions os/common/ext/CMSIS/ArteryTek/AT32F415/at32f415kx.h
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Original file line number Diff line number Diff line change
Expand Up @@ -278,6 +278,7 @@ typedef struct
__IO uint32_t CTRL; /*!< CRC Control register, Address offset: 0x08 */
uint32_t RESERVED; /*!< Reserved, Address offset: 0x0C */
__IO uint32_t IDT; /*!< CRC Initialization register, Address offset: 0x10 */
__IO uint32_t POLY; /*!< CRC Polynomial register, Address offset: 0x14 */
} CRC_TypeDef;

/**
Expand Down Expand Up @@ -4164,6 +4165,24 @@ typedef struct
#define CRC_CTRL_RST_Msk (0x1U << CRC_CTRL_RST_Pos) /*!< 0x00000001 */
#define CRC_CTRL_RST CRC_CTRL_RST_Msk /*!< Reset CRC calculation unit */

/*!< POLY_SIZE configuration */
#define CRC_CTRL_POLY_SIZE_Pos (3U)
#define CRC_CTRL_POLY_SIZE_Msk (0x3U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000018 */
#define CRC_CTRL_POLY_SIZE CRC_CTRL_POLY_SIZE_Msk /*!< POLY_SIZE[1:0] bits (Polynomial size) */
#define CRC_CTRL_POLY_SIZE_0 (0x1U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000008 */
#define CRC_CTRL_POLY_SIZE_1 (0x2U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000010 */

#define CRC_CTRL_POLY_SIZE_32BITS 0x00000000U /*!< 32 bits */
#define CRC_CTRL_POLY_SIZE_16BITS_Pos (3U)
#define CRC_CTRL_POLY_SIZE_16BITS_Msk (0x1U << CRC_CTRL_POLY_SIZE_16BITS_Pos) /*!< 0x00000008 */
#define CRC_CTRL_POLY_SIZE_16BITS CRC_CTRL_POLY_SIZE_16BITS_Msk /*!< 16 bits */
#define CRC_CTRL_POLY_SIZE_8BITS_Pos (4U)
#define CRC_CTRL_POLY_SIZE_8BITS_Msk (0x1U << CRC_CTRL_POLY_SIZE_8BITS_Pos) /*!< 0x00000010 */
#define CRC_CTRL_POLY_SIZE_8BITS CRC_CTRL_POLY_SIZE_8BITS_Msk /*!< 8 bits */
#define CRC_CTRL_POLY_SIZE_7BITS_Pos (3U)
#define CRC_CTRL_POLY_SIZE_7BITS_Msk (0x3U << CRC_CTRL_POLY_SIZE_7BITS_Pos) /*!< 0x00000018 */
#define CRC_CTRL_POLY_SIZE_7BITS CRC_CTRL_POLY_SIZE_7BITS_Msk /*!< 7 bits */

/*!< REVID configuration */
#define CRC_CTRL_REVID_Pos (5U)
#define CRC_CTRL_REVID_Msk (0x3U << CRC_CTRL_REVID_Pos) /*!< 0x00000060 */
Expand Down Expand Up @@ -4191,6 +4210,11 @@ typedef struct
#define CRC_IDT_IDT_Msk (0xFFFFFFFFU << CRC_IDT_IDT_Pos) /*!< 0xFFFFFFFF */
#define CRC_IDT_IDT CRC_IDT_IDT_Msk /*!< Initialization data register */

/******************* Bit definition for CRC_POLY register *******************/
#define CRC_POLY_POLY_Pos (0U)
#define CRC_POLY_POLY_Msk (0xFFFFFFFFU << CRC_POLY_POLY_Pos) /*!< 0xFFFFFFFF */
#define CRC_POLY_POLY CRC_POLY_POLY_Msk /*!< Polynomial coefficient */

/******************************************************************************/
/* */
/* Inter-integrated circuit interface (I2C) */
Expand Down
24 changes: 24 additions & 0 deletions os/common/ext/CMSIS/ArteryTek/AT32F415/at32f415rx.h
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Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -281,6 +281,7 @@ typedef struct
__IO uint32_t CTRL; /*!< CRC Control register, Address offset: 0x08 */
uint32_t RESERVED; /*!< Reserved, Address offset: 0x0C */
__IO uint32_t IDT; /*!< CRC Initialization register, Address offset: 0x10 */
__IO uint32_t POLY; /*!< CRC Polynomial register, Address offset: 0x14 */
} CRC_TypeDef;

/**
Expand Down Expand Up @@ -4237,6 +4238,24 @@ typedef struct
#define CRC_CTRL_RST_Msk (0x1U << CRC_CTRL_RST_Pos) /*!< 0x00000001 */
#define CRC_CTRL_RST CRC_CTRL_RST_Msk /*!< Reset CRC calculation unit */

/*!< POLY_SIZE configuration */
#define CRC_CTRL_POLY_SIZE_Pos (3U)
#define CRC_CTRL_POLY_SIZE_Msk (0x3U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000018 */
#define CRC_CTRL_POLY_SIZE CRC_CTRL_POLY_SIZE_Msk /*!< POLY_SIZE[1:0] bits (Polynomial size) */
#define CRC_CTRL_POLY_SIZE_0 (0x1U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000008 */
#define CRC_CTRL_POLY_SIZE_1 (0x2U << CRC_CTRL_POLY_SIZE_Pos) /*!< 0x00000010 */

#define CRC_CTRL_POLY_SIZE_32BITS 0x00000000U /*!< 32 bits */
#define CRC_CTRL_POLY_SIZE_16BITS_Pos (3U)
#define CRC_CTRL_POLY_SIZE_16BITS_Msk (0x1U << CRC_CTRL_POLY_SIZE_16BITS_Pos) /*!< 0x00000008 */
#define CRC_CTRL_POLY_SIZE_16BITS CRC_CTRL_POLY_SIZE_16BITS_Msk /*!< 16 bits */
#define CRC_CTRL_POLY_SIZE_8BITS_Pos (4U)
#define CRC_CTRL_POLY_SIZE_8BITS_Msk (0x1U << CRC_CTRL_POLY_SIZE_8BITS_Pos) /*!< 0x00000010 */
#define CRC_CTRL_POLY_SIZE_8BITS CRC_CTRL_POLY_SIZE_8BITS_Msk /*!< 8 bits */
#define CRC_CTRL_POLY_SIZE_7BITS_Pos (3U)
#define CRC_CTRL_POLY_SIZE_7BITS_Msk (0x3U << CRC_CTRL_POLY_SIZE_7BITS_Pos) /*!< 0x00000018 */
#define CRC_CTRL_POLY_SIZE_7BITS CRC_CTRL_POLY_SIZE_7BITS_Msk /*!< 7 bits */

/*!< REVID configuration */
#define CRC_CTRL_REVID_Pos (5U)
#define CRC_CTRL_REVID_Msk (0x3U << CRC_CTRL_REVID_Pos) /*!< 0x00000060 */
Expand Down Expand Up @@ -4264,6 +4283,11 @@ typedef struct
#define CRC_IDT_IDT_Msk (0xFFFFFFFFU << CRC_IDT_IDT_Pos) /*!< 0xFFFFFFFF */
#define CRC_IDT_IDT CRC_IDT_IDT_Msk /*!< Initialization data register */

/******************* Bit definition for CRC_POLY register *******************/
#define CRC_POLY_POLY_Pos (0U)
#define CRC_POLY_POLY_Msk (0xFFFFFFFFU << CRC_POLY_POLY_Pos) /*!< 0xFFFFFFFF */
#define CRC_POLY_POLY CRC_POLY_POLY_Msk /*!< Polynomial coefficient */

/******************************************************************************/
/* */
/* Inter-integrated circuit interface (I2C) */
Expand Down