Merge pull request #406 from WestberryTech/chibios-21.11.x-wb

[WB32 MCU] Fix some issue.
ChibiOS · Aug 11, 2024 · ce62332 · ce62332
2 parents e5d314d + d8ea1c1
commit ce62332
Show file tree

Hide file tree

Showing 9 changed files with 56 additions and 35 deletions.
diff --git a/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h b/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h
@@ -63,7 +63,7 @@
  * @note Allowed values are 16, 32 or 64 bits.
  */
 #if !defined(CH_CFG_ST_RESOLUTION)
-#define CH_CFG_ST_RESOLUTION 32
+#define CH_CFG_ST_RESOLUTION 16
 #endif
 
 /**
@@ -100,7 +100,7 @@
  * this value.
  */
 #if !defined(CH_CFG_ST_TIMEDELTA)
-#define CH_CFG_ST_TIMEDELTA 0
+#define CH_CFG_ST_TIMEDELTA 2
 #endif
 
 /** @} */

diff --git a/demos/WB32/RT-WB32F3G71-RTC/main.c b/demos/WB32/RT-WB32F3G71-RTC/main.c
@@ -121,9 +121,6 @@ int main(void) {
  while (true){
  chThdSleepSeconds(2);
  rtcGetTime(&RTCD1, &timespec);
- chprintf((BaseSequentialStream *)&SERIAL_DEBUG_DRIVER, 
- "lsi sleep %ds year = %d month = %d dstflag=%d dayofweek = %d day = %d millisecond = %d\r\n",
- RTC_ALARMPERIOD, timespec.year, timespec.month, timespec.dstflag, timespec.dayofweek, timespec.day, timespec.millisecond);
  chThdSleepSeconds(3);
 
  chSysDisable();

diff --git a/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h b/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h
@@ -63,7 +63,7 @@
  * @note Allowed values are 16, 32 or 64 bits.
  */
 #if !defined(CH_CFG_ST_RESOLUTION)
-#define CH_CFG_ST_RESOLUTION 32
+#define CH_CFG_ST_RESOLUTION 16
 #endif
 
 /**
@@ -100,7 +100,7 @@
  * this value.
  */
 #if !defined(CH_CFG_ST_TIMEDELTA)
-#define CH_CFG_ST_TIMEDELTA 0
+#define CH_CFG_ST_TIMEDELTA 2
 #endif
 
 /** @} */

diff --git a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c
@@ -243,22 +243,22 @@ void st_lld_serve_interrupt(void) {
 #if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
 #if ST_LLD_NUM_ALARMS > 1
  if ((sr & TIM_SR_CC2IF) != 0U) {
- if (st_callbacks[2] != NULL) {
- st_callbacks[0](1U);
+ if (st_callbacks[1] != NULL) {
+ st_callbacks[1](1U);
  }
  }
 #endif
 #if ST_LLD_NUM_ALARMS > 2
  if ((sr & TIM_SR_CC3IF) != 0U) {
  if (st_callbacks[2] != NULL) {
- st_callbacks[1](2U);
+ st_callbacks[2](2U);
  }
  }
 #endif
 #if ST_LLD_NUM_ALARMS > 3
  if ((sr & TIM_SR_CC4IF) != 0U) {
- if (st_callbacks[2] != NULL) {
- st_callbacks[2](3U);
+ if (st_callbacks[3] != NULL) {
+ st_callbacks[3](3U);
  }
  }
 #endif

diff --git a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h
@@ -154,7 +154,7 @@
 #define ST_LLD_NUM_ALARMS WB32_ST_ENFORCE_ALARMS
 #endif
 
-#elif OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
+#elif OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
 
 #define WB32_ST_USE_SYSTICK TRUE
 #define WB32_ST_USE_TIM2 FALSE
@@ -225,8 +225,10 @@ static inline void st_lld_start_alarm(systime_t abstime) {
  WB32_ST_TIM->SR = 0;
 #if ST_LLD_NUM_ALARMS == 1
  WB32_ST_TIM->DIER = WB32_TIM_DIER_CC1IE;
+ WB32_ST_TIM->CCER = WB32_TIM_CCER_CC1E;
 #else
  WB32_ST_TIM->DIER |= WB32_TIM_DIER_CC1IE;
+ WB32_ST_TIM->CCER |= WB32_TIM_CCER_CC1E;
 #endif
 }
 
@@ -239,8 +241,10 @@ static inline void st_lld_stop_alarm(void) {
 
 #if ST_LLD_NUM_ALARMS == 1
  WB32_ST_TIM->DIER = 0U;
+ WB32_ST_TIM->CCER = 0U;
 #else
  WB32_ST_TIM->DIER &= ~WB32_TIM_DIER_CC1IE;
+ WB32_ST_TIM->CCER &= ~WB32_TIM_CCER_CC1E;
 #endif
 }
 
@@ -300,6 +304,7 @@ static inline void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) {
  WB32_ST_TIM->CCR[alarm] = (uint32_t)abstime;
  WB32_ST_TIM->SR = 0;
  WB32_ST_TIM->DIER |= (WB32_TIM_DIER_CC1IE << alarm);
+ WB32_ST_TIM->CCER |= (WB32_TIM_CCER_CC1E << (alarm * 4));
 }
 
 /**
@@ -314,6 +319,7 @@ static inline void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) {
 static inline void st_lld_stop_alarm_n(unsigned alarm) {
 
  WB32_ST_TIM->DIER &= ~(WB32_TIM_DIER_CC1IE << alarm);
+ WB32_ST_TIM->CCER &= ~(WB32_TIM_CCER_CC1E << (alarm * 4));
 }
 
 /**

diff --git a/os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c b/os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c
@@ -63,10 +63,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI0_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR0;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 0);
 
+ EXTI->PR = EXTI_PR_PR0;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -83,10 +84,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI1_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR1;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 1);
 
+ EXTI->PR = EXTI_PR_PR1;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -103,9 +105,10 @@ OSAL_IRQ_HANDLER(WB32_EXTI2_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR2;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 2);
+
+ EXTI->PR = EXTI_PR_PR2;
 
  OSAL_IRQ_EPILOGUE();
 }
@@ -123,10 +126,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI3_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR3;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 3);
 
+ EXTI->PR = EXTI_PR_PR3;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -143,10 +147,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI4_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR4;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 4);
 
+ EXTI->PR = EXTI_PR_PR4;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -164,14 +169,16 @@ OSAL_IRQ_HANDLER(WB32_EXTI9_5_IRQ_VECTOR) {
 
  pr = EXTI->PR & (EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 |
  EXTI_PR_PR8 | EXTI_PR_PR9);
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 5);
  exti_serve_irq(pr, 6);
  exti_serve_irq(pr, 7);
  exti_serve_irq(pr, 8);
  exti_serve_irq(pr, 9);
 
+ EXTI->PR = EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 |
+ EXTI_PR_PR8 | EXTI_PR_PR9;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -189,7 +196,6 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) {
 
  pr = EXTI->PR & (EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 |
  EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15);
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 10);
  exti_serve_irq(pr, 11);
@@ -198,6 +204,9 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) {
  exti_serve_irq(pr, 14);
  exti_serve_irq(pr, 15);
 
+ EXTI->PR = EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 |
+ EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif

diff --git a/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h b/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h
@@ -99,13 +99,13 @@
 #define WB32_HAS_TIM3 TRUE
 #define WB32_HAS_TIM4 TRUE
 
-#define WB32_TIM1_IS_32BITS TRUE
+#define WB32_TIM1_IS_32BITS FALSE
 #define WB32_TIM1_CHANNELS 4
-#define WB32_TIM2_IS_32BITS TRUE
+#define WB32_TIM2_IS_32BITS FALSE
 #define WB32_TIM2_CHANNELS 4
-#define WB32_TIM3_IS_32BITS TRUE
+#define WB32_TIM3_IS_32BITS FALSE
 #define WB32_TIM3_CHANNELS 4
-#define WB32_TIM4_IS_32BITS TRUE
+#define WB32_TIM4_IS_32BITS FALSE
 #define WB32_TIM4_CHANNELS 4
 
 /* I2C attributes */

diff --git a/os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c b/os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c
@@ -63,10 +63,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI0_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR0;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 0);
 
+ EXTI->PR = EXTI_PR_PR0;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -83,10 +84,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI1_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR1;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 1);
 
+ EXTI->PR = EXTI_PR_PR1;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -103,9 +105,10 @@ OSAL_IRQ_HANDLER(WB32_EXTI2_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR2;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 2);
+
+ EXTI->PR = EXTI_PR_PR2;
 
  OSAL_IRQ_EPILOGUE();
 }
@@ -123,10 +126,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI3_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR3;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 3);
 
+ EXTI->PR = EXTI_PR_PR3;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -143,10 +147,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI4_IRQ_VECTOR) {
  OSAL_IRQ_PROLOGUE();
 
  pr = EXTI->PR & EXTI_PR_PR4;
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 4);
 
+ EXTI->PR = EXTI_PR_PR4;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -164,14 +169,16 @@ OSAL_IRQ_HANDLER(WB32_EXTI9_5_IRQ_VECTOR) {
 
  pr = EXTI->PR & (EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 |
  EXTI_PR_PR8 | EXTI_PR_PR9);
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 5);
  exti_serve_irq(pr, 6);
  exti_serve_irq(pr, 7);
  exti_serve_irq(pr, 8);
  exti_serve_irq(pr, 9);
 
+ EXTI->PR = EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 |
+ EXTI_PR_PR8 | EXTI_PR_PR9;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif
@@ -189,7 +196,6 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) {
 
  pr = EXTI->PR & (EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 |
  EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15);
- EXTI->PR = pr;
 
  exti_serve_irq(pr, 10);
  exti_serve_irq(pr, 11);
@@ -198,6 +204,9 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) {
  exti_serve_irq(pr, 14);
  exti_serve_irq(pr, 15);
 
+ EXTI->PR = EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 |
+ EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15;
+
  OSAL_IRQ_EPILOGUE();
 }
 #endif

diff --git a/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h b/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h
@@ -99,13 +99,13 @@
 #define WB32_HAS_TIM3 TRUE
 #define WB32_HAS_TIM4 TRUE
 
-#define WB32_TIM1_IS_32BITS TRUE
+#define WB32_TIM1_IS_32BITS FALSE
 #define WB32_TIM1_CHANNELS 4
-#define WB32_TIM2_IS_32BITS TRUE
+#define WB32_TIM2_IS_32BITS FALSE
 #define WB32_TIM2_CHANNELS 4
-#define WB32_TIM3_IS_32BITS TRUE
+#define WB32_TIM3_IS_32BITS FALSE
 #define WB32_TIM3_CHANNELS 4
-#define WB32_TIM4_IS_32BITS TRUE
+#define WB32_TIM4_IS_32BITS FALSE
 #define WB32_TIM4_CHANNELS 4
 
 /* I2C attributes */