tiny—yolov3（keras）检测自己的图像，三类目标

YoloV3/tiny-YoloV3+RaspberryPi3/Ubuntu LaptopPC+NCS/NCS2+USB Camera+Python+OpenVINO

A Wide Range of Custom Functions for YOLOv4, YOLOv4-tiny, YOLOv3, and YOLOv3-tiny Implemented in TensorFlow, TFLite, and TensorRT.

YOLOv4, YOLOv4-tiny, YOLOv3, YOLOv3-tiny Implemented in Tensorflow 2.0, Android. Convert YOLO v4 .weights tensorflow, tensorrt and tflite

This project acquires the PDM (Pulse Density Modulation) microphone signal using DFSDM (Digital filter for Sigma-Delta modulators interface) function of STM32 MCU and outputs its frequency characte…

Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA

YOLOv4 / Scaled-YOLOv4 / YOLO - Neural Networks for Object Detection (Windows and Linux version of Darknet )

darknet深度学习框架源码分析：详细中文注释，涵盖框架原理与实现语法分析

a vivado design both using PL and PS, to achieve camera capturing and VGA display on Zedboard.

the communication between PL and PS in a Xilinx Zynq Board.

PL-PS data exchange in Zynq devices

Data transport between PL and PS on Xilinx ZYNQ -- MSc Thesis at TUC

minimal code to access ps DDR from PL

Python Productivity for ZYNQ

LDPC编码解码matlab代码和Verilog代码及资料

BSc. Project (UoW) - simulation of GSM and EDGE network modulation schemes (GMSK and 8PSK)

GMSK modem on raspberry pi, pandaboard any other linux board

Fork of https://github.com/mindspore-ai/mindspore

A lightweight and high-performance service module that helps MindSpore developers efficiently deploy online inference services in the production environment.

MindSpore is a new open source deep learning training/inference framework that could be used for mobile, edge and cloud scenarios.

锁相环环路响应图像

Digital portions of a FPGA-based PLL on a Nexys Video Board

Phase-locked-loop project for an FPGA design course

For FPGA experimentation/ research

More advanced phase-locked-loop project for an FPGA design course

little FPGA PLL

A collection of phase locked loop (PLL) related projects