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update for 5.18.12
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ptr1337 committed Jul 15, 2022
1 parent c6e06ee commit b9143b0
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Showing 20 changed files with 9,618 additions and 172,480 deletions.
3 changes: 2 additions & 1 deletion 5.18/0001-bbr2.patch
Original file line number Diff line number Diff line change
@@ -1,10 +1,11 @@
From 84441f200b0ab11ba140f719ed30472a9a7c0b72 Mon Sep 17 00:00:00 2001
From 3893291797cd918d3f586f7d2586f9581e41729b Mon Sep 17 00:00:00 2001
From: Piotr Gorski <[email protected]>
Date: Mon, 6 Jun 2022 12:06:05 +0200
Subject: [PATCH 01/16] bbr2

Signed-off-by: Piotr Gorski <[email protected]>
(cherry picked from commit 5dcdd263190426aee1f2a4fcfad012ee70ec5c79)
(cherry picked from commit 84441f200b0ab11ba140f719ed30472a9a7c0b72)
---
include/linux/tcp.h | 3 +-
include/net/inet_connection_sock.h | 3 +-
Expand Down
5 changes: 3 additions & 2 deletions 5.18/0001-bcachefs-after-lru.patch
Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
From 39405523cef4a738d3295dc8c5dc9a5a4766fc57 Mon Sep 17 00:00:00 2001
From 0ec9a8041bba30cc37388015a6837e36994dc788 Mon Sep 17 00:00:00 2001
From: Peter Jung <[email protected]>
Date: Thu, 14 Jul 2022 21:23:53 +0200
Subject: [PATCH 16/16] bcachefs-after-lru
Subject: [PATCH 15/16] bcachefs-after-lru

Signed-off-by: Peter Jung <[email protected]>
(cherry picked from commit 39405523cef4a738d3295dc8c5dc9a5a4766fc57)
---
Documentation/core-api/printk-formats.rst | 22 +
arch/powerpc/kernel/process.c | 16 +-
Expand Down
81 changes: 41 additions & 40 deletions 5.18/0002-cachy.patch
Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
From 4c5a18de0d506c1ad4fd4784f4be2a825222f6f2 Mon Sep 17 00:00:00 2001
From b3144f259e6a4d704576fc10e006a26e3798df73 Mon Sep 17 00:00:00 2001
From: Peter Jung <[email protected]>
Date: Thu, 14 Jul 2022 21:04:25 +0200
Subject: [PATCH 02/16] cachy

Signed-off-by: Peter Jung <[email protected]>
(cherry picked from commit 4c5a18de0d506c1ad4fd4784f4be2a825222f6f2)
---
.../admin-guide/kernel-parameters.txt | 13 +
Documentation/admin-guide/pm/cpuidle.rst | 15 +-
Expand Down Expand Up @@ -112,7 +113,7 @@ Signed-off-by: Peter Jung <[email protected]>
104 files changed, 1953 insertions(+), 437 deletions(-)

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index eb92195ca015..459ba83aaca6 100644
index c4893782055b..b23ba248cce9 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1615,6 +1615,19 @@
Expand Down Expand Up @@ -169,7 +170,7 @@ index aec2cd2aaea7..19754beb5a4e 100644
In addition to the architecture-level kernel command line options affecting CPU
idle time management, there are parameters affecting individual ``CPUIdle``
diff --git a/Makefile b/Makefile
index 390bf0b444c5..6ce5012be96e 100644
index 323032d60ac3..104fea80f168 100644
--- a/Makefile
+++ b/Makefile
@@ -758,6 +758,8 @@ else ifdef CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3
Expand Down Expand Up @@ -754,10 +755,10 @@ index 542377cd419d..22b919cdb6d1 100644
default "4"

diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index fb0de637411c..c6494396e510 100644
index 63d50f65b828..8cd235d38634 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -149,8 +149,44 @@ else
@@ -143,8 +143,44 @@ else
# FIXME - should be integrated in Makefile.cpu (Makefile_32.cpu)
cflags-$(CONFIG_MK8) += -march=k8
cflags-$(CONFIG_MPSC) += -march=nocona
Expand Down Expand Up @@ -826,7 +827,7 @@ index c84d12608cd2..14902db4c01f 100644
#
# Due to a historical design error, certain syscalls are numbered differently
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 5d09ded0c491..9aac5afb0468 100644
index e17de69faa54..dd7a27e09dc8 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -219,7 +219,7 @@
Expand All @@ -839,18 +840,18 @@ index 5d09ded0c491..9aac5afb0468 100644
#define X86_FEATURE_IBRS_ENHANCED ( 7*32+30) /* Enhanced IBRS */
#define X86_FEATURE_MSR_IA32_FEAT_CTL ( 7*32+31) /* "" MSR IA32_FEAT_CTL configured */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index ad084326f24c..8e8491a35e35 100644
index 4425d6773183..8f7079b680ae 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -548,6 +548,7 @@
@@ -538,6 +538,7 @@
#define MSR_AMD_CPPC_CAP2 0xc00102b2
#define MSR_AMD_CPPC_REQ 0xc00102b3
#define MSR_AMD_CPPC_STATUS 0xc00102b4
+#define MSR_AMD_CPPC_HW_CTL 0xc0010015

#define AMD_CPPC_LOWEST_PERF(x) (((x) >> 0) & 0xff)
#define AMD_CPPC_LOWNONLIN_PERF(x) (((x) >> 8) & 0xff)
@@ -558,6 +559,8 @@
@@ -548,6 +549,8 @@
#define AMD_CPPC_MIN_PERF(x) (((x) & 0xff) << 8)
#define AMD_CPPC_DES_PERF(x) (((x) & 0xff) << 16)
#define AMD_CPPC_ENERGY_PERF_PREF(x) (((x) & 0xff) << 24)
Expand Down Expand Up @@ -969,10 +970,10 @@ index 75884d2cdec3..4e6a08d4c7e5 100644
#define MODULE_PROC_FAMILY "ELAN "
#elif defined CONFIG_MCRUSOE
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 35d5288394cb..2502d30c443b 100644
index 0c0b09796ced..ff2075f26ef4 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1184,7 +1184,8 @@ u32 amd_get_highest_perf(void)
@@ -1152,7 +1152,8 @@ u32 amd_get_highest_perf(void)
struct cpuinfo_x86 *c = &boot_cpu_data;

if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) ||
Expand All @@ -983,7 +984,7 @@ index 35d5288394cb..2502d30c443b 100644

if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) ||
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 622dc3673c37..9a454449af58 100644
index b370767f5b19..e26c63615931 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -813,24 +813,43 @@ static void amd_e400_idle(void)
Expand Down Expand Up @@ -1542,10 +1543,10 @@ index 54752c85604b..6fa8de3ce7aa 100644
* and keyboards.
*/
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index b463d85bfb35..691a2df56fcf 100644
index c5a019eab5ec..ed48d6c201cb 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -555,7 +555,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -529,7 +529,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x01",
.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
.exit_latency = 10,
Expand All @@ -1554,7 +1555,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -563,7 +563,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -537,7 +537,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x10",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 33,
Expand All @@ -1563,7 +1564,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -571,7 +571,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -545,7 +545,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x20",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 133,
Expand All @@ -1572,7 +1573,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -579,7 +579,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -553,7 +553,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x32",
.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 166,
Expand All @@ -1581,7 +1582,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -587,7 +587,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -561,7 +561,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x40",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 300,
Expand All @@ -1590,7 +1591,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -595,7 +595,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -569,7 +569,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x50",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 600,
Expand All @@ -1599,7 +1600,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -603,7 +603,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
@@ -577,7 +577,7 @@ static struct cpuidle_state hsw_cstates[] __initdata = {
.desc = "MWAIT 0x60",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 2600,
Expand All @@ -1608,7 +1609,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -623,7 +623,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -597,7 +597,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x01",
.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
.exit_latency = 10,
Expand All @@ -1617,7 +1618,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -631,7 +631,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -605,7 +605,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x10",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 40,
Expand All @@ -1626,7 +1627,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -639,7 +639,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -613,7 +613,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x20",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 133,
Expand All @@ -1635,7 +1636,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -647,7 +647,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -621,7 +621,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x32",
.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 166,
Expand All @@ -1644,7 +1645,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -655,7 +655,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -629,7 +629,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x40",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 300,
Expand All @@ -1653,7 +1654,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -663,7 +663,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -637,7 +637,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x50",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 600,
Expand All @@ -1662,7 +1663,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -671,7 +671,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
@@ -645,7 +645,7 @@ static struct cpuidle_state bdw_cstates[] __initdata = {
.desc = "MWAIT 0x60",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 2600,
Expand All @@ -1671,7 +1672,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -692,7 +692,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -666,7 +666,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x01",
.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
.exit_latency = 10,
Expand All @@ -1680,7 +1681,7 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -700,7 +700,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -674,7 +674,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x10",
.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 70,
Expand All @@ -1689,52 +1690,52 @@ index b463d85bfb35..691a2df56fcf 100644
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -708,7 +708,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -682,7 +682,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x20",
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 85,
- .target_residency = 200,
+ .target_residency = 600,
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -716,7 +716,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -690,7 +690,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x33",
.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
.flags = MWAIT2flg(0x33) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 124,
- .target_residency = 800,
+ .target_residency = 3000,
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -724,7 +724,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -698,7 +698,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x40",
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 200,
- .target_residency = 800,
+ .target_residency = 3200,
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -732,7 +732,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -706,7 +706,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x50",
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 480,
- .target_residency = 5000,
+ .target_residency = 9000,
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -740,7 +740,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
@@ -714,7 +714,7 @@ static struct cpuidle_state skl_cstates[] __initdata = {
.desc = "MWAIT 0x60",
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED | CPUIDLE_FLAG_IBRS,
.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
.exit_latency = 890,
- .target_residency = 5000,
+ .target_residency = 9000,
.enter = &intel_idle,
.enter_s2idle = intel_idle_s2idle, },
{
@@ -761,7 +761,7 @@ static struct cpuidle_state skx_cstates[] __initdata = {
@@ -735,7 +735,7 @@ static struct cpuidle_state skx_cstates[] __initdata = {
.desc = "MWAIT 0x01",
.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_ALWAYS_ENABLE,
.exit_latency = 10,
Expand Down
3 changes: 2 additions & 1 deletion 5.18/0003-Extend-DAMOS-for-Proactive-LRU-lists-Sorting.patch
Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
From d03cdf56b4a24c060667892a20609773eb6ed086 Mon Sep 17 00:00:00 2001
From 167808e61b863d1e78923b08d13ee25c1cb47093 Mon Sep 17 00:00:00 2001
From: Peter Jung <[email protected]>
Date: Thu, 14 Jul 2022 21:04:51 +0200
Subject: [PATCH 03/16] Extend-DAMOS-for-Proactive-LRU-lists-Sorting

Signed-off-by: Peter Jung <[email protected]>
(cherry picked from commit d03cdf56b4a24c060667892a20609773eb6ed086)
---
Documentation/admin-guide/mm/damon/index.rst | 1 +
.../admin-guide/mm/damon/lru_sort.rst | 294 ++++++++++
Expand Down
7 changes: 4 additions & 3 deletions 5.18/0004-fixes.patch
Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
From f394f8994aa00a20b677bd1d6804ac0b2c460bb0 Mon Sep 17 00:00:00 2001
From 3d83c03b7d96ae6afbd9a904c1ad9ae658750a13 Mon Sep 17 00:00:00 2001
From: Peter Jung <[email protected]>
Date: Thu, 14 Jul 2022 21:09:46 +0200
Subject: [PATCH 04/16] fixes

Signed-off-by: Peter Jung <[email protected]>
(cherry picked from commit f394f8994aa00a20b677bd1d6804ac0b2c460bb0)
---
Makefile | 5 --
arch/x86/kernel/acpi/cppc.c | 6 ++
Expand Down Expand Up @@ -49,7 +50,7 @@ Signed-off-by: Peter Jung <[email protected]>
41 files changed, 277 insertions(+), 114 deletions(-)

diff --git a/Makefile b/Makefile
index 6ce5012be96e..6a6674273e8e 100644
index 104fea80f168..9a4839f34d17 100644
--- a/Makefile
+++ b/Makefile
@@ -993,11 +993,6 @@ KBUILD_CFLAGS += -fno-strict-overflow
Expand Down Expand Up @@ -82,7 +83,7 @@ index 3677df836e91..0961bf38bdb0 100644
}
return false;
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index db96bf7d1122..0e5cb76ed3d1 100644
index 89b11e7dca8a..c58366ae4da2 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -247,6 +247,9 @@ enum x86_transfer_type {
Expand Down
3 changes: 2 additions & 1 deletion 5.18/0005-hwmon.patch
Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
From 18d1c36bf4caca3454408e6c8222e2230d6f1d50 Mon Sep 17 00:00:00 2001
From cfd7e976f53d58948d427807f08d44161a67b835 Mon Sep 17 00:00:00 2001
From: Peter Jung <[email protected]>
Date: Thu, 14 Jul 2022 21:10:18 +0200
Subject: [PATCH 05/16] hwmon

Signed-off-by: Peter Jung <[email protected]>
(cherry picked from commit 18d1c36bf4caca3454408e6c8222e2230d6f1d50)
---
.../bindings/hwmon/nuvoton,nct6775.yaml | 57 +
Documentation/hwmon/asus_ec_sensors.rst | 29 +-
Expand Down
3 changes: 2 additions & 1 deletion 5.18/0006-lrng.patch
Original file line number Diff line number Diff line change
@@ -1,9 +1,10 @@
From 0efe792225657e05618c908e1b03b141bda42ea6 Mon Sep 17 00:00:00 2001
From 80695f5c7d149bff82743ffd79bac03f6258a293 Mon Sep 17 00:00:00 2001
From: Peter Jung <[email protected]>
Date: Thu, 14 Jul 2022 21:12:18 +0200
Subject: [PATCH 06/16] lrng

Signed-off-by: Peter Jung <[email protected]>
(cherry picked from commit 0efe792225657e05618c908e1b03b141bda42ea6)
---
MAINTAINERS | 7 +
crypto/drbg.c | 16 +-
Expand Down
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