Code, documentation, schematics, notes for my Ben Eater inspired breadboard computer and emulator

An Emulator for the SAP-1 Computer

An implementation of a simple processor (SAP1) using VHDL

Simple As Possible 1 Simulation. The circuit design is done by Proteus 8.1

ModSim - 1st Machine Problem

SAP-1, or Simple As Possible-1, is a basic microprocessor designed for educational purposes by Albert Paul Malvino and Taiachi Shinano. It includes essential components like the instruction register, program counter, memory unit, and arithmetic logic unit, offering insight into computer architecture and digital logic in a simplistic manner.

Yet Another SAP-1 based 8-bit computer

LogicSim 4bit Computer

A FPGA implementation of Ben Eater's SAP-1 computer using the Digilent's BASYS 3 board.

Il mio breadboard computer TTL a 8 bit basato sulla realizzazione di Ben Eater e sui miglioramenti di Tom Nisbet

https://sap1-simulator.almeda.io/