FP16xINT4 LLM inference kernel that can achieve near-ideal ~4x speedups up to medium batchsizes of 16-32 tokens.
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Updated
Aug 15, 2024 - Python
FP16xINT4 LLM inference kernel that can achieve near-ideal ~4x speedups up to medium batchsizes of 16-32 tokens.
Commented source code of Texas Instrument's original Speak and Spell™
Supporting code for "LLMs for your iPhone: Whole-Tensor 4 Bit Quantization"
A Raspberry Pi Pico (RP2040)-based 2114 SRAM Emulator for the Busch 2090 Microtronic Computer System
These are VHDL codes for a signed 4bit multiplier using 4bit adders. Base on Baugh-Wooley Method.
This emulates the 4bit computer and be able to run on the browser.
4 bit ALU in verilog
A cycle-accurate VHDL model for COP400 devices
Layout of 4bit Ripple Carry Adder formed using CMOS logic in gpdk180nm technology node done in Cadence Virtuoso with no DRC and LVS errors.