🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
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Updated
Aug 12, 2024 - VHDL
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Code generation tool for control and status registers
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Network on Chip Implementation written in SytemVerilog
Control and status register code generator toolchain
OPAE porting to Xilinx FPGA devices.
Simple single-port AXI memory interface
Implementation of the Advanced Encryption Standard in Chisel
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA
VHDL design for rotary encoder. Can be used accessed via digital signals or AXI interface.
Common SystemVerilog RTL modules for RgGen
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