cpu

internal/cpu(in Go standard lib) with these detections:

AVX512

Cache Size

Invariant TSC

It also provides:

False sharing range, see X86FalseSharingRange for X86 platform.

TSC frequency

Name

Family & Model

Acknowledgement

Name		Name	Last commit message	Last commit date
Latest commit History 22 Commits
.gitignore		.gitignore
LICENSE		LICENSE
README.md		README.md
cpu.go		cpu.go
cpu_386.go		cpu_386.go
cpu_amd64.go		cpu_amd64.go
cpu_amd64p32.go		cpu_amd64p32.go
cpu_arm.go		cpu_arm.go
cpu_arm64.go		cpu_arm64.go
cpu_loong64.go		cpu_loong64.go
cpu_mips.go		cpu_mips.go
cpu_mips64.go		cpu_mips64.go
cpu_mips64le.go		cpu_mips64le.go
cpu_mipsle.go		cpu_mipsle.go
cpu_no_init.go		cpu_no_init.go
cpu_ppc64x.go		cpu_ppc64x.go
cpu_riscv64.go		cpu_riscv64.go
cpu_s390x.go		cpu_s390x.go
cpu_s390x.s		cpu_s390x.s
cpu_wasm.go		cpu_wasm.go
cpu_x86.go		cpu_x86.go
cpu_x86.s		cpu_x86.s