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Remove decimal/floating 64/128bit switches due to register pressure #16287

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@pmattione-nvidia pmattione-nvidia commented Jul 16, 2024

The decimal <--> floating conversion PR reduced the performance of some of the AST and BINARYOP kernels due to register pressure. This removes the switches that are the primary source of the register pressure, falling back to the old ipow() method for 64bit and 128bit integers.

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  • I am familiar with the Contributing Guidelines.
  • New or existing tests cover these changes.
  • The documentation is up to date with these changes.

@pmattione-nvidia pmattione-nvidia added libcudf Affects libcudf (C++/CUDA) code. Performance Performance related issue improvement Improvement / enhancement to an existing function non-breaking Non-breaking change labels Jul 16, 2024
@pmattione-nvidia pmattione-nvidia self-assigned this Jul 16, 2024
@pmattione-nvidia pmattione-nvidia requested a review from a team as a code owner July 16, 2024 08:22
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improvement Improvement / enhancement to an existing function libcudf Affects libcudf (C++/CUDA) code. non-breaking Non-breaking change Performance Performance related issue
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