and the general technique is even more

Some "Timeless" valid using present-day, high-speed op

amps and SPOT CMOS switches.1
The circuit shown in Figure 1 uses an

Ideas For Design op amp as a unipolar-to-bipolar, analog-

level shifter controlled by 0- to 10- V
logic signals. The op amp sees only posi-
tive signals at its input, but because it is

F
or this special analog issue, we're ized by using today's parts. logic programmed between equal gain
trying out a new column concept. Converting Fast Logic Inputs to Bipolar states of positive and negative, the out-
Based on some favorable comments Analog Signal Levels: A useful analog put signal is bipolar. With a stable dc
received on the January, 1998 "An- signal source for the lab is a variable- level as an input Vx, the op amp is logic
niversary" column, this one takes a look output, bipolar-level, square- (or rec- programmed between precise gains of
back at some older Ideas for Design tangular-) wave generator. With just a ±1. The output amplitude levels are then
(IFDs). The general theme here is few parts, standard logic sig- as stable as the voltage Vx-
"Timelessness," that is, ideas which are nals can be used to program The analog switch (origi-
still as viable today as when they origi- an analog switch, which dri- nally shown as a CD4016) is
nally appeared. For this initial case, the ves a fast op amp to ±10-V driven by the clock input,
IFD candidates are limited to my own, outputs. As it happens, this is which also drives a logic in-
which happens to make things expedi- a standard op-amp signal- verter stage (another 4016
ent. But, we do hope that enough folks processing function, known section—but note that this
out there like revisiting IFD classics, so also as a sign changer. This function would be unneces-
that in time, the idea can be expanded name comes from the circuit's sary using modern SPOT
in scope and frequency. Do let us know ability to multiply an input switches). The complemen-
your feelings on this! signal by a precise factor of tary logic drive signals pro-
In choosing from my ELECTRONIC either+1 or-1. gram the first two switch sec-
WALT JUNG
DESIGN IFDs, I tried to pick those CMOS switches like 4016s tions into a SPOT function,
worthwhile, which have also retained are easily interfaced with with the switch output arm
(or appreciated) value since their orig- standard unipolar CMOS logic levels. driving the op amp positive input.
inal appearance. Those below date But, quite interestingly, they can also Dependent upon the logic drive
from the 1970's, but I think you'll be married with a fast, dc-accurate, op- state, the positive input is connected to
agree they are just as useful today as amp sign-changer circuit. An IFD either potentiometer R5's output, Vx,
back then. More so, if they're modern- which does this was described in 1977, or to ground. Simultaneously, R5 also
 WALT'S TOOLS AND TIPS
WALT JUNG

presents the same Vx signal reference (which is 10 ppm/°C

to the op amp's negative in- or less). And, if the resistors
put, via Rl. Note that the op- are specified well enough, their
amp circuit has a precise gain net price can be more than the
of-R2/Rl (or-1) for V x , basic reference 1C itself!
when the positive input goes But, you can still have your
to ground, or alternately, a cake and eat it too, as a mir-
precise gain +1, when the pos- ror-imaging scheme allows a
itive input goes to Vx. Thus positive reference to be "po-
the name, sign changer! larity-flipped," to produce a
The op-amp negative-gain negative output of the same
accuracy is dependent upon magnitude and stability of
R1-R2 resistor matching, the reference 1C used. This
while positive gain is inher- scheme, described in an IFD
ently unity (within the al- in 1978, circumvents the
lowance of the op-amp com- added errors and expense of
mon-mode error—usually the inversion scheme.2
very small). Although the Vx In the basic, negative-refer-
signal is always a positive dc ence circuit of Figure 2, preci-
voltage set by R5, the op amp sion op amp A2 allows Al's
level shifts and translates this signal, Rl and the input to the switch. This positive reference voltage to flip over
multiplying it by the logic signal. This will remove time-dependent errors to its exact negative at the output, pin
produces bipolar and symmetrical am- due to the dynamic loading of Rl. 6 of A2. Al was originally shown as a
plitude output waves of ±VX. Note that when a stable, 5-V (or 10- REF02E, a standard reference 1C. In
While signal amplitude symmetry V) reference source is used for Vx, the this case, the output from A2 is -5 V.
and control of the negative output output amplitude will be tightly con- While the REF02 is still readily avail-
peak amplitude is primarily governed trolled. Or, a DAC can also allow am- able, in principle, just about any three-
by the match between Rl and R2, plitude programmability via software. terminal reference 1C can be used in
there is also a loading effect. The op Generating Negative Voltage References this manner, allowing optimization for
amp alternately loads Vx with a value with Low Errors: Voltage reference ICs the required accuracy, drift, standby
of 10 kQ, or an open circuit. So, a non- proliferate, but they are predominantly power, etc.
zero source impedance for Vx can pro- in positive-output, three-terminal for- In operation, Al has its positive out-
duce some time-dependent errors, mats. So, when you do need a negative put connected in A2's feedback loop.
even though Vx is bypassed by C5. Re- reference, you can also find it a chal- With A2's positive input grounded as
sistor R3 provides offset-current com- lenge. To implement a negative refer- shown, the normal output pin of Al is
pensation for the op amp, and the feed- ence based on a positive output type, also "virtually grounded," by the feed-
back capacitor across R2 reduces the one straightforward approach is to fol- back hookup. This essentially places
settling time of the circuit (and should low a positive-output 1C with a stan- the stable reference voltage of Al be-
be trimmed for the op amp used). dard op-amp inverter, to create a -5-V tween A2's output and the negative in-
Originally the op amp used was an output from, say, a 5-V positive input. put. Using a 5-V REF02, this creates a
NE530A, which is no longer available. While this approach functionally -5-V output, as accurate as the basic
However, many more-recent op amps achieves the requirement, it also adds REF02 specs allow. R2 and Dl can aid
offer greater speed (preferably 100 some serious drawbacks. For example, in circuit startup, but may not be neces-
V/|is or more, combined with fast set- the ratio temperature coefficient (TC) of sary in all applications.
tling). One candidate would be an the inverter's gain-set resistors can eas- The circuit's output-current rating is
AD825, which has JFET inputs, and ily be far worse than the TC of a good dependent upon the op amp used for
can also handle the large dif- A2. This will be 10 to 20 mA (or
ferential input swings without less) for most standard de-
problems (bipolar-input op vices, such as an OP07 or
amps may have problems due OP177 (a preferred choice for
to input overload). the circuit today). The ampli-
The circuit can also be im- fier can be optimized for
proved by the use of two am- higher output current if neces-
plifiers. One can be used for sary, either by buffering or us-
the basic amplifier shown, ing a higher-current part.
and the second as a unity- Using REF02-type parts,
gain buffer for V x . This output voltage can optionally
buffer (not part of the origi- be trimmed by Rl, but this is-
nal circuit) should be placed n't essential for basic opera-
between the arm of R5-C5, tion. Also note that the Al
and the load represented by reference 1C itself operates
 WALT JUNG

with no loading other than Rl (if drive A2's noninverting input. Thus,
used), enhancing stability. Other Al for this phase of input, the circuit acts
options could include low-quiescent- as a voltage-follower, and resistors
current operation, by use of a low-cur- R1-R3 have little influence on accu-
rent-level reference device for Al. racy. For negative inputs, Dl is off and
Overall temperature stability can D2 is on, closing a loop around Al as a
be enhanced by choosing a precision follower. With R2 = Rl, A2 is driven
op amp for A2, such as an OP07E. The through Rl as a unity-gain inverter.
maximum drift of this op amp will only The circuit's output is a unity-gain,
contribute about 0.25 ppm/°C of drift full-wave rectified version of the in-
beyond that of a 5-V level reference 1C put—positive for diode polarities
for Al, which is negligible. Conse- shown (reverse for negative output).
quently, the net circuit drift is essen- Interestingly, the only precision com-
tially dominated by Al's drift. Output ponents are R1-R2. For the best ac
calibration will also be essentially the performance, capacitor Cl lowers the
tolerance limits of Al, for A2 V0s lev- effective gain-bandwidth of Al, and
els of 0.1 mV or less. helps stability.
In picking a modern op amp for this In the circuit, FET-input op amps
circuit, be sure to choose one that is minimize source loading and bias-cur-
fully compatible with all power supply rent errors. However, there is a caveat
and accuracy issues. While the OP07 here—avoid using FET-input parts
series works fine for older ±15-V sup- prone to phase reversal. Wide com-
plies, a modern system may need to mon-mode range units such as the
develop, say, -2.5 V with ±5-V sup- AD823 are useful in this context. But
plies. An OP97EP is a good choice for for good dc and low-frequency accu-
such a system, along with a AD780BN racy, high common-mode rejection is
2.5-V reference.3 typically better in bipolar types, and
Flexibility is another hallmark of even general-purpose types such as
this hookup. In fact, it can even accom- LM358s work OK. More-precise parts
modate two-terminal (diode-like) ref- do, of course, work better for overall
erence ICs. For example, with Al com- accuracy. Most dual op amps match
pletely removed, and using an AD1580 the standard pinout shown.
reference diode for Dl, the circuit de- We hope that you have enjoyed this
velops a buffered, -1.225-V output. trip back in time revisiting a few "time-
The op amp allows variable currents less" analog designs. If you'd like to see
from the circuit, unlike the conven- more of this with other ELECTRONIC
tional two-terminal device operation. DESIGN IFD classics, drop us a note.
A Buffered Precision Rectifier: The
precision rectifier (also called an ab- References:
solute-value circuit) is another op-amp 1. Jung, W, "Convert Unipolar CMOS
staple application. And, toward its op- Signals Into Analog Bipolar Outputs,"
timization, the rectifier is often config- ELECTRONIC DESIGN, October 25,
ured for reduction of precision resis- 1977, p. 88.
tors, amplifiers, etc. One such rectifier 2. Jung, W., "Positive Reference-Volt-
was described in a 1978IFD.4 age 1C is Flipped Negative by Adding a
Figure 3 gets down to a bare mini- Single Component," ELECTRONIC DE-
mum of matched precision resistors— SIGN, February 15,1978, p. 98.
one pair, R1-R2—without perfor- 3. Jung, W, "Getting the Most from 1C
mance reduction. And, with modern, Voltage References," Analog Dia-
dual 1C devices, two op amps aren't logue, vol. 28-1,1994.
necessarily a disadvantage, as many 4. Jung, W, "Get Accurate Absolute-
models can be chosen to fit the bill. Value Outputs with Only One
In the circuit, Al serves as an input Matched-Resistor Pair," ELECTRONIC
buffer and/or switch, and A2 as an in- DESIGN, December 20,1978, p. 102.
verting buffer or follower. Due to the
arrangement, the circuit is self- Walt Jung is a corporate staff ap-
buffered for input/output. It won't plications engineer for Analog De-
load the source, and drives standard vices, Norwood, Mass. A longtime
loads with good performance. contributor to ELECTRONIC DESIGN, he
For positive-going inputs, Al's out- can be reached via e-mail at:
put is positive, which biases Dl to Walt_Jung @CSI.com.