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    Component Creation: Quartus Tool Tip: Answer

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    Fabio Marujo
    This document provides instructions for creating a component from VHDL code or a schematic (BDF) file that can then be used in another design file. It describes compiling the original design, selecting the file, and choosing "Create Symbol Files for Current File" to generate a symbol file (.bsf) that represents the component. This symbol can then be placed in a new schematic file and connected to other components to build a larger design. The steps are demonstrated using an example of creating a symbol for MUX_41a VHDL code to use in a schematic.

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    Component Creation: Quartus Tool Tip: Answer

    Uploaded by

    Fabio Marujo
    48 views3 pages
    This document provides instructions for creating a component from VHDL code or a schematic (BDF) file that can then be used in another design file. It describes compiling the original design, selecting the file, and choosing "Create Symbol Files for Current File" to generate a symbol file (.bsf) that represents the component. This symbol can then be placed in a new schematic file and connected to other components to build a larger design. The steps are demonstrated using an example of creating a symbol for MUX_41a VHDL code to use in a schematic.

    Original Title

    Component_Creation_at _QuartusII.pdf

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    This document provides instructions for creating a component from VHDL code or a schematic (BDF) file that can then be used in another design file. It describes compiling the original design, selecting the file, and choosing "Create Symbol Files for Current File" to generate a symbol file (.bsf) that represents the component. This symbol can then be placed in a new schematic file and connected to other components to build a larger design. The steps are demonstrated using an example of creating a symbol for MUX_41a VHDL code to use in a schematic.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    48 views3 pages

    Component Creation: Quartus Tool Tip: Answer

    Uploaded by

    Fabio Marujo
    This document provides instructions for creating a component from VHDL code or a schematic (BDF) file that can then be used in another design file. It describes compiling the original design, selecting the file, and choosing "Create Symbol Files for Current File" to generate a symbol file (.bsf) that represents the component. This symbol can then be placed in a new schematic file and connected to other components to build a larger design. The steps are demonstrated using an example of creating a symbol for MUX_41a VHDL code to use in a schematic.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    University of Florida EEL 3701 Drs. Eric M.

    Schwartz & Karl Gugel


    Department of Electrical & Computer Engineering 11-Mar-10
    Page 1/2 Revision 0

    Component Creation: Quartus Tool Tip


    Question: How do I create a component from a previously designed schematic (BDF file), so that I
    can place it into a new schematic (BDF file)?
    Answer: After successfully compiling the project, select the graphics editor window (BDF file) and
    then choose File | Create / Update | Create Symbol Files for Current File. This will
    create a file with the extension bsf in the same directory. This symbol can now be used in
    a new schematic.

    Question: How do I create a component from previously designed VHDL code, so that I can place it
    into a new schematic (BDF file)?
    Answer: After successfully compiling the project, select the VHDL file and then choose
    File | Create / Update | Create Symbol Files for Current File. This will create a file with
    the extension bsf in the same folder. This symbol can now be used in a new schematic.
    The below example will demonstrate the technique.

    We would like to create a graphical component out of the MUX_41a VHDL code shown below
    (MUX41a.vhd) and use it graphically in another design. (Alternatively, you could create this same
    MUX with several ANDs, ORs and NOTs using schematic entry in a BDF file.)

    1
    University of Florida EEL 3701 Drs. Eric M. Schwartz & Karl Gugel
    Department of Electrical & Computer Engineering 11-Mar-10
    Page 2/2 Revision 0

    Component Creation: Quartus Tool Tip


    The steps to create a graphical component for MUX_41a.vhd (or a bdf file):
    1. In Quartus, create a new project called LabX. I made
    the project LabX in folder comp_creation (for
    component creation). Create a vhd (or bdf file)
    calledMUX_41a.vhd. Set this file as your “Top-Level
    Entity”, i.e., Project | Set as Top-Level Entity) and then
    compile.
    2. After compilation, select the design file
    (MUX_41a.vhd). Create a new symbol as by selecting
    File | Create / Update | Create Symbol Files for
    Current File. A symbol file (MUX_41a.bsf) has been
    created in that same folder.
    3. Create a new schematic entry (bdf) file in the same
    folder. This is the file in which you want to place your
    newly created VHDL (or schematic entry) component
    symbol. Now double-click the left mouse button to
    enter a symbol and select the symbol you just created
    (MUX_41a), as shown in this figure. Save this
    schematic entry file as Labx.bdf.
    4. You should see the symbol that you have created from
    your VHDL file now on your schematic. It is
    illustrated in the figure below.
    5. You can now add wires & I/O to the input
    and output ports of the component as you would any
    other component selected out of Altera’s libraries,
    as shown in the figure below.

    2
    University of Florida EEL 3701 Drs. Eric M. Schwartz & Karl Gugel
    Department of Electrical & Computer Engineering 11-Mar-10
    Page 3/2 Revision 0

    Component Creation: Quartus Tool Tip


    Special Note: It is best not to name the VHDL component and BDF file the same name. Use different
    names for each.

    Example application:
    The logic equations for an ASM controller can be easily specified using VHDL (much easier than
    graphically entering the gates in a bdf schematic entry file). More importantly, they can be changed
    easily during the debugging phase without having to redraw and connect the gates every time. Using the
    graphical symbol, the equations can then be integrated with the rest of the ASM.

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