System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits

R Weerasekera - 2008 - diva-portal.org
Continued technology scaling together with the integration of disparate technologies in a
single chip means that device performance continues to outstrip interconnect and packaging …

[PDF][PDF] System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits

R WEERASEKERA - Citeseer
Continued technology scaling together with the integration of disparate technologies in a
single chip means that device performance continues to outstrip interconnect and packaging …

System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits

R Weerasekera - 2008 - swepub.kb.se
Continued technology scaling together with the integration of disparate technologies in a
single chip means that device performance continues to outstrip interconnect and packaging …