Mukim et al., 2021 - Google Patents

Multiwire phase encoding: A signaling strategy for high-bandwidth, low-power data movement

Mukim et al., 2021

View PDF
Document ID
4465498565775155111
Author
Mukim P
Brewer F
Publication year
Publication venue
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

External Links

Snippet

This article presents multiwire phase encoding (MWPE), a transition signaling technique aimed at chip-to-chip communication on silicon interposer technology, where multiple, relatively low-bandwidth transmission lines can be easily routed between high-performance …
Continue reading at ieeexplore.ieee.org (PDF) (other versions)

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels; Baseband coding techniques specific to data transmission systems
    • H04L25/493—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels; Baseband coding techniques specific to data transmission systems by transition coding, i.e. the time-position or direction of a transition being encoded before transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; Arrangements for supplying electrical power along data transmission lines
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating pulses not covered by one of the other main groups in this subclass
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • H—ELECTRICITY
    • H03—BASIC ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information or similar information or a subset of information is represented by a different sequence or number of digits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom

Similar Documents

Publication Publication Date Title
US8199849B2 (en) Data transmitting device, data receiving device, data transmitting system, and data transmitting method
US9184906B1 (en) Configurable pulse amplitude modulation clock data recovery
EP0679307B1 (en) Delay line separator for data bus
EP1589682B1 (en) Demultiplexer circuit
US20060198463A1 (en) Device for converting a transmitted signal into a digital signal
US20070168848A1 (en) Error-detection flip-flop
US8023605B2 (en) Oversampling circuit and oversampling method
CN101572527A (en) High-speed high-jitter-tolerance random-data linear phase detector circuit
US9154291B2 (en) Differential signal skew adjustment method and transmission circuit
US20040114702A1 (en) Bang-bang phase detector for full-rate and half-rate schemes clock and data recovery and method therefor
EP3051424B1 (en) Transition enforcing coding receiver for sampling vector signals without using clock and data recovery
US4905257A (en) Manchester decoder using gated delay line oscillator
US8509367B2 (en) Receiver interface
Mukim et al. Multiwire phase encoding: A signaling strategy for high-bandwidth, low-power data movement
US7342520B1 (en) Method and system for multilevel serializer/deserializer
KR100324981B1 (en) Single terminal pulse gating circuit
US6987824B1 (en) Method and system for clock/data recovery for self-clocked high speed interconnects
US5327466A (en) 1X asynchronous data sampling clock
Elsayed et al. Low-power all-digital manchester-encoding-based high-speed serdes transceiver for on-chip networks
US20060088137A1 (en) Multi-frequency clock stretching systems
US7660364B2 (en) Method of transmitting serial bit-stream and electronic transmitter for transmitting a serial bit-stream
Muzaffar et al. Edge-Coded Signaling Techniques
Suresh et al. Low-power, low-latency transceiver design using d-TGMS flip-flop for on-chip interconnects
Yeo et al. Non-sequential linear CMOS phase detector for CDR applications
Smith et al. Differential edge-modulated signaling with encoded clock and dynamic data rate scaling